GS9001 데이터 시트보기 (PDF) - Gennum -> Semtech

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GS9001

EDH Coprocessor

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The counter can be programmed either to clear automatically During the stand-alone mode of operation, flag masking,

when the counter status is read via the interface, or to clear video standard override and programmable interrupt features

when forced through the interface.

are disabled. The user can still monitor the video standard and

I2C Serial Communications Interface

the error flags through dedicated pins as shown in Table 2.

EDH Passthrough Mode

The serial communications interface allows access to all error

flags and other internal programmable functions. The Inter- An EDH passthrough mode is available to aid in system

Integrated Circuit (I2C) protocol is used. For information on diagnostics. This mode is selected by address 1,0 on A1, A0

the GS9001 I2C protocol, refer to Document 521 - 59 "Using pins. In this mode, the GS9001 will not insert a new EDH

the GS9001 EDH Coprocessor".

packet into the data stream. Input data is bypassed to output

without modification. Error flag status available through the

The slave addresses for the I2C interface are given in Table 3.

Data formats for the I2C interface READ and WRITE operations

are given in Tables 4 and 5.

I2C interface and output pins, is now invalid. However, valid

CRC words can be read through the I2C interface every field,

for a static picture.

NOFTORRENCEOWMMDEENSDIGENDS NOTE:

Table 3. I2C Slave Addresses

I2C Address is 00011A1 A0

A1

A0

Function

0

0

Available Device Address

0

1

Available Device Address

1

0

EDH Passthrough Mode

1

1

Test Mode

If an I2C interface is not used, address 0, 1 will force TRS-ID indication on the ancillary data pin. This is to facilitate

applications in which TRS-ID is desired, but an I2C interface is not used. In this case, the SCL clock line must be

connected to the most negative supply.

7 of 14

521 - 38 - 04

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