GS9001 데이터 시트보기 (PDF) - Gennum -> Semtech
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GS9001 Datasheet PDF : 14 Pages
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ˇ ˇTable 4. I2C - Interface: Data Format for READ 15 Words
Word
Address
B7
B6
Databits
B5
B4
B3
B2
B1
B0
Comments
1
AP
AP
AP
ANC ANC
ANC ANC ANC
15 Error Flags (according to
IDH
EDA EDH UES IDA
IDH EDA EDH
SMPTE RP165) see note
below for flag ANC EXT
2
ANC FF
FF
FF
FF
FF
AP
AP
EXT
UES IDA IDH
EDA
EDH UES IDA
3
Error counter
NTSC HD1 D1
Video standard & error counter
b20
b19
b18 b17
b16
PAL D1
D2
4
Error counter
Error counter 21 bits wide
b15
b14
b13 b12
b11
b10 b9
b8
ED 5
Error counter
b7
b6
b5
b4
b3
b2
b1
b0
D 6
Active Picture CRC
Active picture CRC
N S b15
b14
b13 b12
b11
b10 b9
b8
16 bits wide
E N 7
Active Picture CRC
b7
b6
b5
b4
b3
b2
b1
b0
M IG 8
Full Field CRC
Full Field CRC 16 bits wide
b15
b14
b13 b12
b11
b10 b9
b8
M S 9
Full Field CRC
O E b7
b6
b5
b4
b3
b2
b1
b0
C D 10
RW2 RW2 RW1 RW1 RW1
RW1 RW1 RW1
Bits 2 to 7 for reserved
b3
b2
b7
b6
b5
b4
b3
b2
words 1 to 7
RE W 11
RW3 RW3 RW3 RW3 RW2
RW2 RW2 RW2
b5
b4
b3
b2
b7
b6
b5
b4
Example:
E Bit number 4 of reserved
T 12
RW4 RW4 RW4 RW4 RW4
RW4 RW3 RW3
word 2 is denoted as
N b7
b6
b5
b4
b3
b2
b7
b6
RW2 b4
O 13
RW6 RW6 RW5 RW5 RW5
RW5 RW5 RW5
N R b3
b2
b7
b6
b5
b4
b3
b2
O 14
RW7 RW7 RW7 RW7 RW6
RW6 RW6 RW6
Fb5
b4
b3
b2
b7
b6
b5
b4
15
0
0
0
0
0
0
RW7 RW7
b7
b6
NOTES: The error counter is 21 bits wide and counts the number of fields that had errors. This counter can be made to increment
only upon the occurrence of a specific type of flag in a field. This sensitivity is programmable through SANC,SFF & SAP
class of flags (see WRITE section). ANC EXT is a flag defined to indicate any checksum error in the EDH packet.
Reserved Words 1 to 7 in an EDH packet are both readable and writable. Only bits 2 to 7 of each reserved word
are available. During Write operation for every reserved word, Even Parity is added as bit 8 and bit 9 is the logical inverse
of bit 8. Bits 0 and 1 are zero to maintain compatibility with 8 bit systems.
521 - 38 - 04
16 bit Active Picture CRC and Full Field CRC words are available for every field, through the I2C interface.
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