HC5517(1998) 데이터 시트보기 (PDF) - Intersil
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HC5517 Datasheet PDF : 18 Pages
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HC5517
IR
=
–----4----(--R---R-S-----∆----I-L-----)
RR-----89--
+
V-----RR-----X--
IR
R
+ ∆IL - + ∆IL -
R11
R13
TIP
A
-
+
-
+ VC
R
VRX
1VP
OUT1
R
R/20
VRING
R/2
VC = –4RS∆ILRR-----89-- + VRX
†
+- 2VDC
IOUT1 =
4RS∆IL
2R
R8
R9
VTR RL
∆VIN
+-
+RS∆IL
-
-
+
∆IL
+
R11 = R12 = R13 = R14 = RS
-
∆IL
+
B
R12
RING
- ∆IL +
R14
- ∆IL +
90kΩ 90kΩ
+
-
-RS∆IL
-
+
+
- VD
VD
=
4 RS ∆IL
RR-----89--
– VRX
R9
+
-
2
VTX
+
4R-S∆IL
R8
-IN1
-
+
-
4RS∆IL
+
R8
R9
†
-
+
VBAT
2
† GROUNDED FOR AC ANALYSIS
FIGURE 3. AC VOLTAGE GAIN AND IMPEDANCE MATCHING
same amount to account for resistors R12 and R14.
The net effect cancels out the voltage drop across the feed
resistors. By nullifying the effects of the feed resistors the
feedback circuitry becomes relatively easy to match the
impedance at points “A” and “B”.
IMPEDANCE MATCHING DESIGN EQUATIONS
Matching the impedance of the SLIC to the load is
accomplished by writing a loop equation starting at VD and
going around the loop to VC. The loop equation to match the
impedance of any load is as follows (Note: VRX = 0 for this
analysis):
–4
RS
∆IL
R-R----89-
+
2 RS ∆IL –∆VI N
+
RL
∆IL
+
2
RS
∆IL –4
RS
∆IL
R-R----89-
=
0
(EQ. 17)
∆V I N
=
–8RS
∆IL
R-R----89-
+ 4RS∆IL + RL∆IL
(EQ. 18)
∆V I N
=
∆IL
–8
RS
RR-----89-
+ 4RS + RL
(EQ. 19)
Equation 19 can be separated into two terms, the feedback
(-8RS(R8/R9)) and the loop impedance (+4RS+RL).
∆---∆-V---I-I-L-N--
=
–8
RS
RR-----89-
+ 4RS + RL
(EQ. 20)
The result is shown in Equation 20. Figure 4 is a schematic
representation of Equation 15.
RL
∆VIN
+
-
LOAD
SLIC
8RS
RR-----89--
+
4RS
FIGURE 4. SCHEMATIC REPRESENTATION OF EQUATION 20
To match the impedance of the SLIC to the impedance of the
load, set:
RL
=
8
RS
RR-----89-
+ 4RS
(EQ. 21)
If R9 is made to equal 8RS then:
RL = R8 + 4RS
(EQ. 22)
67
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