HEF4027B(2008) 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4027B Datasheet PDF : 13 Pages
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NXP Semiconductors
HEF4027B
Dual JK flip-flop
Table 3. Function table[1] …continued
Inputs
Outputs
nSD
nCD
nCP
nJ
nK
nQ
L
L
↑
L
L
no change
L
L
↑
H
L
H
L
L
↑
L
H
L
L
L
↑
H
H
nQ
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.; ↑ = positive-going transition.
8. Limiting values
nQ
no change
L
H
nQ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDD
IIK
VI
IOK
II/O
IDD
Tstg
Tamb
Ptot
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
in free air
Tamb −40 °C to +125 °C
DIP16 package
SO16 package
P
power dissipation
per output
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
Min
−0.5
-
−0.5
-
-
-
−65
−40
[1] -
[2] -
-
9. Recommended operating conditions
Max
Unit
+18
V
±10
mA
VDD + 0.5 V
±10
mA
±10
mA
50
mA
+150
°C
+85
°C
750
mW
500
mW
100
mW
Table 5.
Symbol
VDD
VI
Tamb
∆t/∆V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
ambient temperature
in free air
input transition rise and fall rate
VDD = 5 V
VDD = 10 V
VDD = 15 V
Min Max
3
15
0
VDD
−40
+85
-
3.75
-
0.5
-
0.08
Unit
V
V
°C
ns/V
ns/V
ns/V
HEF4027B_5
Product data sheet
Rev. 05 — 10 November 2008
© NXP B.V. 2008. All rights reserved.
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