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HI5703EVAL 데이터 시트보기 (PDF) - Intersil

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HI5703EVAL
Intersil
Intersil Intersil
HI5703EVAL Datasheet PDF : 18 Pages
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Electrical Specifications
CAVycClCe;=CDLV=C2C01pF=;DTVAC=C225=oC+;5D.0iVff;eVreRnEtiFa+l A=n3a.lo2g5VIn; pVuRt;EUF n- l=es2s.0OVt;hfeSrw=is3e6
MSPS at
Specified
50% Duty
(Continued)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS
Aperture Delay, tAP
Aperture Jitter, tAJ
Data Output Delay, tOD
Data Output Hold, tH
Data Output Enable Time, tEN
Data Output Enable Time, tDIS
Clock Pulse Width (Low)
Clock Pulse Width (High)
Data Latency, tLAT
Power-Up Initialization
AVCC = DVCC1 = 5V ±10%,
D0oVCCCT2A=37.30VoC±5%,
40 MSPS Clock
40 MSPS Clock
For a Valid Sample (Note 2)
Data Invalid Time (Note 2)
-
5
-
ns
-
5
-
ps
-
7
-
ns
5
7
18
ns
-
4
-
ns
-
7
-
ns
-
7
-
ns
11.875
12.5
13.125
ns
11.875
12.5
13.125
ns
-
-
7
Cycles
-
-
20
Cycles
POWER SUPPLY CHARACTERISTICS
Analog Supply Voltage, AVCC
Digital Supply Voltage, DVCC1
Digital Output Supply Voltage, DVCC2
At 3.30V
At 5.0V
4.75
5.0
5.25
V
4.75
5.0
5.25
V
3.135
3.3
3.465
V
4.75
5.0
5.25
V
Total Supply Current, ICC
Analog Supply Current, AICC
Digital Supply Current, DICC1
Digital Output Supply Current, DICC2
Power Dissipation
Offset Error Sensitivity, VOS
Full Scale Error Sensitivity, FSE
VIN+ - VIN- = +1.25V and DFS = “0”
-
80
-
mA
VIN+ - VIN- = +1.25V and DFS = “0”
-
48
-
mA
VIN+ - VIN- = +1.25V and DFS = “0”
-
30
-
mA
VIN+ - VIN- = +1.25V and DFS = “0”
-
2
-
mA
VIN+ - VIN- = +1.25V and DFS = “0”
-
400
-
mW
AVCC or DVCC = 5V ±5%
-
±1.5
-
LSB
AVCC or DVCC = 5V ±5%
-
±0.2
-
LSB
NOTES:
2. Parameter guaranteed by design or characterization and not production tested.
3. With the clock low and DC input.
4-6

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