HT1647A(2009) 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT1647A Datasheet PDF : 19 Pages
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HT1647A
Functional Description
System Oscillator
The HT1647A system clock is used to generate the time
base/Watchdog Timer (WDT) clock frequency, LCD
driving clock, and tone frequency. The clock source
may be from an on-chip RC oscillator (32kHz), a crystal
oscillator (32.768kHz), or an external 32kHz clock by
the S/W setting. The configuration of the system oscilla-
tor is as shown. After the SYS DIS command is exe-
cuted, the system clock will stop and the LCD bias
generator will turn off. That command is available only
for the on-chip RC oscillator or for the crystal oscillator.
Once the system clock stops, the LCD display will be-
come blank, and the time base/WDT loses its function
as well.
The LCD OFF command is used to turn the LCD bias
generator off. After the LCD bias generator switches off
by issuing the LCD OFF command, using the SYS DIS
command reduces power consumption, thus serving as
a system power down command. But if the external
clock source is chosen as the system clock, using the
SYS DIS command can neither turn the oscillator off nor
carry out the power down mode. The crystal oscillator
option can be applied to connect an external frequency
source of 32kHz to the OSCI pin. In this case, the sys-
tem fails to enter the power down mode, similar to the
case in the external 32kHz clock source operation. At
the initial system power on, the HT1647A is at the SYS
DIS state.
O SCI
O SCO
C r y s ta l O s c illa to r
32768H z
E x te r n a l C lo c k S o u r c e
32kH z
S y s te m
C lo c k
O n - c h ip R C O s c illa to r
32kH z
System Oscillator Configuration
Display Memory - RAM Structure
The static display RAM is organized into 512´2 bits and
stores the display data. The contents of the RAM are di-
rectly mapped to the contents of the LCD driver. Data in
the RAM can be accessed by the READ, WRITE and
READ-MODIFY-WRITE commands. The following is a
mapping from the RAM to the LCD patterns.
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
000H
D0 or D1
D2 or D3
001H
D0 or D1
D2 or D3
002H
D0 or D1
D2 or D3
003H
D0 or D1
D2 or D3
004H
D0 or D1
D2 or D3
005H
D0 or D1
D2 or D3
006H
D0 or D1
D2 or D3
007H
D0 or D1
D2 or D3
SEG0
008H
D0 or D1
D2 or D3
009H
D0 or D1
D2 or D3
00AH
D0 or D1
D2 or D3
00BH
D0 or D1
D2 or D3
00CH
D0 or D1
D2 or D3
00DH
D0 or D1
D2 or D3
00EH
D0 or D1
D2 or D3
00FH
D0 or D1
D2 or D3
SEG1
010H ------------------------------1E8H
011H ------------------------------1E9H
012H ------------------------------1EAH
013H ------------------------------1EBH
014H ------------------------------1ECH
015H ------------------------------1EDH
016H ------------------------------1EEH
017H ------------------------------1EFH
SEG2 --------------------------- SEG61
1F0H
D0 or D1
D2 or D3
1F1H
D0 or D1
D2 or D3
1F2H
D0 or D1
D2 or D3
1F3H
D0 or D1
D2 or D3
1F4H
D0 or D1
D2 or D3
1F5H
D0 or D1
D2 or D3
1F6H
D0 or D1
D2 or D3
1F7H
D0 or D1
D2 or D3
SEG62
1F8H
D0 or D1
D2 or D3
1F9H
D0 or D1
D2 or D3
1FAH
D0 or D1
D2 or D3
1FBH
D0 or D1
D2 or D3
1FCH
D0 or D1
D2 or D3
1FDH
D0 or D1
D2 or D3
1FEH
D0 or D1
D2 or D3
1FFH
D0 or D1
D2 or D3
SEG63
Note: One bit of RAM maps to LCD¢s one pixel and decide 2-level gray scale.
RAM structure depends on OP1, OP2 and OP3 option.
Rev. 1.20
8
June 22, 2009
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