HT1647A 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT1647A Datasheet PDF : 19 Pages
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PATENTED
HT1647A
16
1
2
V LC D
V1
V2
COM
V3
V4
V SS
W
16
1
2
W'
V LC D
V1
V2
SEG
V3
V4
V SS
W'
W
V LC D
3 /5 V L C D
C O M ~SEG
1 /5 V L C D
-1 /5 V L C D
-3 /5 V L C D
-V LC D
ON
O FF
ON
1 fra m e
N o te : " W '" R e a l a c tiv e s e g m e n t s ig n a l w id th ( a d ju s ta b le w id th b y P W M d a ta )
" W " M a x . a c tiv e s e g m e n t s ig n a l w id th
P W M ( O N w id th ) : W '/W , 0 £ W '/W £ 1 ( r e fe r to ta b le 1 & ta b e l 2 )
Example of Waveform (B Type) in 1/5 Bias, 1/16 Duty Cycle Drive
Time Base and Watchdog Timer - WDT
The time base generator and WDT share the same
counter which is divided by 256. The IRQ clock can be pro-
grammed as 1Hz, 2Hz, ...., 128Hz output. TIMER
DIS/EN/CLR, WDT DIS/EN/CLR and IRQ EN/DIS are in-
dependent from each other. Once the WDT time-out oc-
curs, the IRQ pin will remain at a logic low level until the
CLR WDT or the IRQ DIS command is issued.
If an external clock is selected as the system frequency
source, the SYS DIS command turns out invalid and the
power down mode fails to be carried out until the exter-
nal clock source is removed.
T im e B a s e
C lo c k S o u r c e
/2 5 6
T IM E R E N /D IS
IR Q
V D D W D T E N /D IS
C L R T im e r
D
Q
W DT
/4
CK
R
IR Q E N /D IS
C LR W D T
Time Base and WDT Configurations
Rev. 1.40
11
April 29, 2011
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