HT1650(2005) 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT1650 Datasheet PDF : 18 Pages
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HT1650
Pad No.
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
X
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1921.00
-1612.45
-1512.45
-1412.45
-1258.55
-1115.95
-980.55
-833.65
-698.25
-552.95
Y
-64.65
-164.65
-264.65
-364.65
-464.65
-564.65
-664.65
-764.65
-864.65
-964.65
-1064.65
-1164.65
-1264.65
-1747.70
-1747.70
-1747.70
-1639.80
-1639.80
-1639.80
-1639.80
-1639.80
-1639.80
Pad No.
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
X
1914.90
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
1918.10
Y
-1751.90
-1465.70
-1365.70
-1265.70
-1165.70
-1065.70
-965.70
-865.70
-765.70
-665.70
-565.70
-465.70
-365.70
-265.70
-160.40
-60.40
39.60
139.60
239.60
339.60
439.60
539.60
Pad No.
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
X
654.90
554.90
454.90
354.90
254.90
154.90
54.90
-45.10
-145.10
-245.10
-345.10
-445.10
-545.10
-645.10
-745.10
-845.10
-945.10
-1045.10
-1145.10
-1245.10
-1345.10
-1445.10
Y
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
1760.40
Pad Description
Pad No.
1~17
71~117
Pad Name
SEG47~SEG63
SEG0~SEG46
18~33
55~70
COM31~COM16
COM0~COM15
34
CS
35
RD
36
37~40
41
WR
DB0~DB3
VSS
42
OSCI
43
OSCO
44
45
46
47, 48
49~53
VDD
VLCD
IRQ
BZ, BZ
T1~T4, T000
I/O
Description
O LCD segment outputs
LCD common outputs, under 80´16 command mode, COM16~COM31 will
O be shared with SEG64~SEG79. COM31/SEG64, COM30/SEG65,
COM29/SEG66....., COM18/SEG77, COM17/SEG78, COM16/SEG79
Chip selection input with pull-high resistor. When the CS is logic high, the
data and command read from or write to the HT1650 are disabled. The serial
I interface circuit is also reset. But if the CS is at a logic low level and is input to
the CS pad, the data and command transmission between the host controller
and the HT1650 are all enabled.
READ clock input with pull-high resistor. Data in the RAM of the HT1650 are
I
clocked out on the falling edge of the RD signal. The clocked out data will ap-
pear on the data line. The host controller can use the next rising edge to latch
the clocked out data.
I
WRITE clock input with pull-high resistor. Data on the DATA line are latched
into the HT1650 on the rising edge of the WR signal.
I/O Parallel data input/output with pull-high resistor
¾ Negative power supply for logic circuit, ground
The OSCI and OSCO pads are connected to a 32.768kHz crystal in order to
I
O
generate a system clock. If the system clock comes from an external clock
source, the external clock source should be connected to the OSCI pad. But
if an on-chip RC oscillator is selected, the OSCI and OSCO pads can be left
open.
¾ Positive power supply for logic circuit
I Power supply for LCD driver circuit
O Time base or Watchdog Timer overflow flag, NMOS open drain output.
O 2kHz or 4kHz frequency output pair (tristate output buffer)
I
Vary bias current pin
It is usually not connected
Rev. 1.20
4
November 10, 2005
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