HT48RA0-3 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT48RA0-3

Remote Type 8-Bit MCU

Holtek Semiconductor 

HT48RA0-3/HT48CA0-3

00H

IA R

Indirect Addressing Register

01H

MP

02H

03H

04H

05H

ACC

06H

PCL

07H

TB LP

08H

TB LH

09H

Location 00H is an indirect addressing register that is

not physically implemented. Any read/write operation to

[00H] accesses the data memory pointed to by MP

(01H). Reading location 00H itself indirectly will return

the result 00H. Writing indirectly results in no operation.

The memory pointer register MP (01H) is a 7-bit register.

Bit 7 of MP is undefined and reading will return the result

²1². Any writing operation to MP will only transfer the

0A H

STATU S

lower 7-bits of data to MP.

0B H

0C H

Accumulator

0D H

0E H

0FH

10H

11H

12H

PA

S p e c ia l P u r p o s e

D a ta M e m o ry

The accumulator closely relates to ALU operations. It is

also mapped to location 05H of the data memory and is

capable of carrying out immediate data operations. Data

movement between two data memory locations has to

pass through the accumulator.

13H

14H

PB

15H

16H

17H

Arithmetic and Logic Unit - ALU

This circuit performs 8-bit arithmetic and logic operation.

The ALU provides the following functions.

· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)

18H

TSR 0

· Logic operations (AND, OR, XOR, CPL)

19H

TSR 1

1A H

C A R L0

1B H

C A R L1

1C H

CARH0

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

1D H

CARH1

The ALU not only saves the results of a data operation but

1E H

:U nused

also changes the contents of the status register.

1FH

20H

G e n e ra l P u rp o s e

D a ta M e m o ry

(3 2 B y te s )

3FH

R e a d a s "0 0 "

Status Register - STATUS

This 8-bit status register (0AH) contains the zero flag

(Z), carry flag (C), auxiliary carry flag (AC), overflow flag

(OV), power down flag (PDF) and watchdog time-out

RAM Mapping

flag (TO). It also records the status information and con-

trols the operation sequence.

Bit No.

0

1

2

3

4

5

6~7

Label

C

AC

Z

OV

PDF

TO

¾

Function

C is set if the operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation; otherwise C is cleared. C is also affected by a ro-

tate through carry instruction.

AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from

the high nibble into the low nibble in subtraction; otherwise AC is cleared.

Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.

OV is set if the operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa; otherwise OV is cleared.

PDF is cleared when either a system power-up or executing the CLR WDT instruction. PDF

is set by executing the HALT instruction.

TO is cleared by a system power-up or executing the CLR WDT or HALT instruction. TO is

set by a WDT time-out.

Unused bit, read as ²0²

Status (0AH) Register

Rev.1.10

6

October 12, 2007

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