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HT46C24(2004) 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT46C24
(Rev.:2004)
Holtek
Holtek Semiconductor Holtek
HT46C24 Datasheet PDF : 49 Pages
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HT46R24/HT46C24
Symbol
Parameter
IDD3
Operating Current
ISTB1
Standby Current (WDT Enabled)
ISTB2
VIL1
VIH1
VIL2
VIH2
VLVR
IOL
Standby Current (WDT Disabled)
Input Low Voltage for I/O Ports,
TMR0, TMR1 and INT
Input High Voltage for I/O Ports,
TMR0, TMR1 and INT
Input Low Voltage (RES)
Input High Voltage (RES)
Low Voltage Reset Voltage
I/O Port Sink Current
IOH
I/O Port Source Current
RPH
Pull-high Resistance
VAD
A/D Input Voltage
EAD
A/D Conversion Error
IADC
Additional Power Consumption
if A/D Converter is Used
Test Conditions
VDD
Conditions
5V
No load, fSYS=8MHz
ADC disable
3V
No load, system HALT
5V
3V
No load, system HALT
5V
Min.
¾
¾
¾
¾
¾
¾
¾
0
¾
¾
¾
¾
¾
¾
¾
¾
3V
VOL=0.1VDD
5V
3V
VOH=0.9VDD
5V
3V
¾
5V
¾
¾
¾
¾
3V
¾
5V
0.7VDD
0
0.9VDD
2.7
4
10
-2
-5
20
10
0
¾
¾
¾
Typ.
3
¾
¾
¾
¾
¾
¾
¾
¾
3
8
20
-4
-10
60
30
¾
±0.5
0.5
1.5
Max.
5
5
10
1
2
0.3VDD
VDD
0.4VDD
VDD
3.3
¾
¾
¾
¾
100
50
VDD
±1
1
3
Unit
mA
mA
mA
mA
mA
V
V
V
V
V
mA
mA
mA
mA
kW
kW
V
LSB
mA
mA
A.C. Characteristics
Symbol
Parameter
fSYS
System Clock
fTIMER
Timer I/P Frequency
(TMR0/TMR1)
tWDTOSC Watchdog Oscillator Period
tRES
tSST
tINT
tAD
tADC
tADCS
tIIC
External Reset Low Pulse Width
System Start-up Timer Period
Interrupt Pulse Width
A/D Clock Period
A/D Conversion Time
A/D Sampling Time
I2C Bus Clock Period
Note: *tSYS=1/fSYS
Test Conditions
VDD
Conditions
¾ 2.2V~5.5V
¾ 3.3V~5.5V
¾ 2.2V~5.5V
¾ 3.3V~5.5V
3V
¾
5V
¾
¾
¾
¾ Wake-up from HALT
¾
¾
¾
¾
¾
¾
¾
¾
Connect to external
¾ pull-high resistor 2kW
Min.
400
400
0
0
45
32
1
¾
1
1
¾
¾
64
Typ.
¾
¾
¾
¾
90
65
¾
1024
¾
¾
76
32
¾
Ta=25°C
Max. Unit
4000
8000
4000
8000
180
130
¾
¾
¾
¾
¾
¾
¾
kHz
kHz
kHz
kHz
ms
ms
ms
*tSYS
ms
ms
tAD
tAD
*tSYS
Rev. 1.50
5
May 3, 2004

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