HT49CV3 데이터 시트보기 (PDF) - Holtek Semiconductor
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HT49CV3 Datasheet PDF : 44 Pages
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HT49RV3/HT49CV3
The lower byte of the program counter (PCL) is avail-
able for program control and is a readable and writeable
register (06H). Moving data into the PCL performs a
short jump. The destination will be within 256 locations.
When a control transfer takes place, an additional
dummy cycle is required.
Program Memory - EPROM
The program memory (EPROM) is used to store the pro-
gram instructions which are to be executed. It also con-
tains data, table, and interrupt entries, and is organized
into 2048´16 bits format. The program counter is com-
posed of 11 bits, so it can directly access the whole pro-
gram memory without changing banks.
Certain locations in the ROM are reserved for special
usage:
· Location 000H
This area is reserved for use by the chip reset for pro-
gram initialization. After a chip reset is initiated, the
program will jump to this location and begin execution.
· Location 004H
This area is reserved for the external interrupt service
program. If the INT0 input pin is activated, and the in-
terrupt is enabled, and the stack is not full, the pro-
gram will jump to this location and begin execution.
000H
D e v ic e In itia liz a tio n P r o g r a m
004H
E x te r n a l In te r r u p t 0 S u b r o u tin e
008H
E x te r n a l In te r r u p t 1 S u b r o u tin e
00C H
T im e r /E v e n t C o u n te r 0 In te r r u p t S u b r o u tin e
010H
T im e r /E v e n t C o u n te r 1 In te r r u p t S u b r o u tin e
014H
S e r ia l In te r fa c e In te r r u p t
P ro g ra m
ROM
018H
M u lti- fu n c tio n In te r r u p t
n00H
L o o k - u p T a b le ( 2 5 6 W o r d s )
nFFH
7FFH
L o o k - u p T a b le ( 2 5 6 W o r d s )
1 6 b its
N o te : n ra n g e s fro m 0 to 7
Program Memory
· Location 008H
This area is reserved for the external interrupt service
program. If the INT1 input pin is activated, and the in-
terrupt is enabled, and the stack is not full, the pro-
gram will jump to this location and begin execution.
· Location 00CH
This area is reserved for the Timer/Event Counter 0 in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
will jump to this location and begin execution.
· Location 010H
This area is reserved for the Timer/Event Counter 1 in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
will jump to this location and begin execution.
· Location 014H
This area is reserved for the Serial Interface interrupt
service program. If 8 bits of data have been received or
transmitted successfully from the serial interface, and
the interrupt is enabled, and the stack is not full, the
program will jump to this location and begin execution.
· Location 018H
This area is reserved for the multi-function interrupt. If
a real time clock interrupt occurs, or if a rising edge is
detected from the RMT input pin, or if a falling edge is
detected from the RMT input pin, or if the RMT over-
flow and the related interrupts are enabled, and the
stack is not full, the program will jump to this location
and begin execution.
· Table location
Any location within the program memory can be used
as a look-up table where programmers can store fixed
data. The instructions ²TABRDC [m]² (the current
page, 1 page=256 words) and ²TABRDL [m]² (the last
page) transfer the contents of the lower-order byte to
the specified data memory, and the contents of the
higher-order byte to TBLH (Table Higher-order byte
register) (08H). Only the destination of the lower-order
byte in the table is well-defined, the other bits of the ta-
ble word are all transferred to the lower portion of
TBLH. The TBLH is a read only register and the table
pointer (TBLP) is a read/write register (07H), which in-
dicates the table location. Before accessing the table,
the location must be placed in the TBLP. All table re-
lated instructions require two cycles to complete the
operation. These areas may function as normal pro-
gram memory depending upon user¢s requirements.
Table Location
Instruction(s)
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P10 P9
P8
@7 @6 @5 @4 @3 @2 @1 @0
TABRDL [m]
1
1
1
@7 @6 @5 @4 @3 @2 @1 @0
Note: *10~*0: Table location bits
@7~@0: Table pointer bits
Table Location
P10~P8: Current program counter bits
Rev. 1.30
7
March 20, 2007
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