HT6220A 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT6220A

Multi-Purpose Encoders

Holtek Semiconductor 

HT6220A/HT6221A/HT6221B/HT6222A

The output code carrier of the DOUT pin is shown in Timing 2.

38kH z

C a r r ie r

8 .7 7 m s

2 6 .3 m s

Timing 2. 38kHz Carrier

The transmission codes employ the PPM (Pulse Position Modulation) method to represent their two logic states by ²0²

(1.12ms) and ²1² (2.24ms) as shown in Timing 3.

"Z e ro "

0 .5 6 m s

"O n e "

3 8 k H z c a r r ie r

d a ta p e r io d ( 1 .1 2 m s )

d a ta p e r io d ( 2 .2 4 m s )

Timing 3. Logic States

3 8 k H z c a r r ie r

· Setting the address codes (A0~A15)

The algorithm rule of the address codes (A0~A15) can

be selected by mask option.

In this case, the 16-bit on-chip MASK ROM (ROM1

and ROM2) are available, and the value of ROM1 (8

bits) and ROM2 (8 bits) are decided by one MASK

LAYER. The current value of ROM1 and ROM2 are

both ²00H². The A0~A7 are set by logical OR between

the external switch S0~S7 and the ROM1. The

A8~A15 equal some bits inverted to A0~A7, the inver-

sion are decided by Logical OR between the external

switch S8~S15 and the ROM2.

For example:

The following is an illustration of these rules in selecting

the address codes (A0~A15).

A IN

C1

H T6220A

C2

C3

C4

C5

200kW ´5

S8

S9

S 10

S 11

S 12

1N 4148´5

S0

S1

S2

S3

S4

( S w itc h O p e n : 0 , S w itc h C lo s e : 1 )

F ill w ith z e r o a u to m a tic a lly

E x te r n a l S w itc h S 0 ~ S 7 : 1 0 0 0 0 0 0 0

S0 S1 S2 S3 S4

O n - c h ip R O M 1 , R O M 2 : 0 0 0 0 0 0 0 0

b it0

b it7

S 0~S 4 O R R O M 1

A 0~A 7: 1 0 0 0 0 0 0 0

A0 A1 A2 A3 A4 A5 A6 A7

A 8 '~ A 1 5 ':

101000

S 8 S 9 S 10 S 11 S 12

000000

b it0

00

00

b it7

S 8~S 12 O R R O M 2

10100000

A0 A1 A2 A3 A4 A5 A6 A7

A 8~A 15: 1 1 0 1 1 1 1 1

C o m p le m e n t

1 : n o n in v e r s io n

0 : in v e r s io n

Rev. 1.10

5

June 1, 2010

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