HT82V46 데이터 시트보기 (PDF) - Holtek Semiconductor

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HT82V46

16-Bit, 45MSPS, 3-Channel CCD/CIS Analog Signal Processor

Holtek Semiconductor 

HT82V46

ADCK

CDS2

C2POS = 1

INTC2

C2DLY[2:0] = 000

C2DLY[2:0] = 001

C2S

C2S

C2S

C2S

C2S

C2DLY[2:0] = 111

C2POS = 0

INTC2

C2DLY[2:0] = 000

C2DLY[2:0] = 001

C2S

C2S

C2S

C2S

C2S

C2DLY[2:0] = 111

C2S

C2S

Figure 5 Internal CDS2 Pulses Generated by Programmable CDS2 Detect Circuit

ADCK : 45MHz

Mode

Timing REQ. Sample Rate

Register Bit

ADCK:CDS2

(MSPS)

CDSREF[1:0] WS MODE4 2CH 1CH CDS EN

MODE1:

3-CH Pixel-by-Pixel

2n:1, n ≥ 3

7.5

―

1

0

0

0

MODE2:

1-CH Line-by-Line

2n:1, n ≥ 3

7.5

MODE3:

1-CH Line-by-Line

3:1

22.5

1

―

0

1

0

1

0

1

1

00

0

0

0

MODE4:

1-CH Line-by-Line

2:1

22.5

―

0

1

0

0

Table 2 “WS” Operating Modes

Note: 1. In 1-channel mode, Setup Register 3 bits 7:6 CH[1:0] determine which input is to be sampled.

2. For Colour Line-by-Line, set Register Bit LNBYLN. For input selection, refer to Table 1, Colour

Selection Description in Line-by-Line mode.

Rev. 1.10

10

November 24, 2011

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