HT93214 데이터 시트보기 (PDF) - Holtek Semiconductor
부품명
상세내역
제조사
HT93214 Datasheet PDF : 16 Pages
| |||
HT93214 Series
Pin Description
Pin Name
I/O
Internal
Connection
Description
C1~C3
R1~R4
X1
X2
XMUTE
HKS
PO
MODE
DTMF
KT
HFI
HFO
These pins along with the HKS form a 4´4 keyboard matrix which can perform key-
board input detection. When on-hook (HKS=high) all the pins are set high. While
I/O
CMOS
I/O
off-hook the column group (C1~C3) is set low and the row group (R1~R4) remains
high for input detection.
Pressing a key connects a single row to a single column HKS and actuates the sys-
tem oscillator that results in a dialing signal output. If more than two keys are
pressed at the same time, no response occurs. The key-in debounce time is 20ms.
I
The system oscillator consists of an inverter, a bias resistor and the necessary load
capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic resona-
OSC tor to the X1 and X2 terminals can implement the oscillator function. The oscillator is
O
turned off in the standby mode, and is actuated whenever a keyboard entry is de-
tected.
O
NMOS
Open Drain
NMOS open drain structure pulled to VSS during dialing signal transmission. Other-
wise, it is an open circuit. This pin is used to mute the speech circuit when transmit-
ting the dial signal.
This pin is used to monitor the status of the hook-switch and its combination with
HFI can control the PO pin output to make or break the line.
I
CMOS
HKS=VDD: On-hook state (PO=low). Except for HFI (hand-free control input), other
functions are all disabled.
HKS=VSS: Off-hook state (PO=high). The chip is in the stand-by mode and ready
to receive the key input.
NMOS open drain output structure, which by receiving the HKS and HFO signals,
control the dialer so as to connect or disconnect the telephone line.
PO is pulled to VSS when HKS is high (on-hook) and HFO is low.
O
NMOS PO is an open circuit which make the line connection when HKS is low (off-hook) or
HFO is high.
During the off-hook state, this pin also outputs the dialing pulse train in pulse mode
dialing. While in the tone mode, this pin is always an open circuit.
This is a tri-state input/output pin, used for dialing mode selection, either Tone
mode or Pulse mode, 10pps/20pps
I/O
CMOS
MODE=VDD: Pulse, 10pps, M/B=1/2
MODE=Floating: Pulse, 20pps, M/B=1/2
MODE=VSS: Tone.
The MODE selection is checked each time a key input is received.
This pin is active only when the chip transmits tone dialing signals. Otherwise, it al-
ways outputs a low. The pin outputs tone signals to drive the external transmitter
O
CMOS amplifier circuit. The load resistor (to VSS) should not be less than 5kW and any DC
load connected to VDD is not allowed.
NMOS open drain structure for keytone output. It outputs 34ms of 600Hz tone burst
O
NMOS when any key is pressed in the pulse mode or when a function key is pressed in the
tone mode.
Pulled-high, this pin is a Schmitt trigger input structure. Active low. Applying a nega-
tive going pulse to HFI can toggle the HFO once and hence control the hand-free
I
CMOS function. The pull-high resistance of HFI is about 200kW typ. An external RC net-
work is recommended for input debouncing.
The HFO pin is a CMOS output structure. Its output is toggle- controlled by a nega-
tive transition on HFI pin. When HFO is high, the hand-free function is enabled and
O
CMOS PO outputs a high to connect the line.
The hand-free function can be released by an on-off-hook operation or by another
HFI input. Refer to the functional description for the hand-free functional operation.
VDD
¾
VSS
¾
MODEO O
¾
¾
NMOS
Positive power supply, 2.0V~5.5V for normal operation
Negative power supply, ground
NMOS open drain output pin pulled to VSS during tone output and is an open circuit
during pulse output.
Rev. 1.10
3
October 2, 2002
Share Link: 