HV219PJ-G 데이터 시트보기 (PDF) - Supertex Inc
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HV219PJ-G Datasheet PDF : 9 Pages
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HV219
Truth Table
Data in 8-Bit Shift Register
LE CL
D0 D1 D2 D3 D4 D5 D6 D7
SW0 SW1
L
L L OFF
H
L L ON
L
LL
OFF
H
LL
ON
L
LL
H
LL
L
LL
H
LL
L
LL
H
LL
L
LL
H
LL
L
LL
H
LL
LL L
HL L
XXXXXXXX H L
X X X X X X X X X H OFF OFF
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition clock.
3. The switches go to a state retaining their present condition at the rising edge of the LE.
4. When LE is low, the shift register data flows through the latch.
5. Shift register clocking has no effect on the switch states if LE is high.
6. The clear input overrides all other inputs.
Output Switch State
SW2 SW3 SW4 SW5
OFF
ON
OFF
ON
OFF
ON
OFF
ON
Hold Previous State
OFF OFF OFF OFF
SW6
OFF
ON
OFF
SW7
OFF
ON
OFF
Logic Timing Waveforms
DN+1
DN
DN-1
DATA
IN
50%
50%
LE
CLOCK
DATA
OUT
VOUT OFF
(TYP)
ON
50%
t SU
50%
t WLE
t SD
50%
th
t DO
50%
t OFF
90%
50%
t ON
10%
CLR
50%
t WCL
50%
5
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