HV623PG 데이터 시트보기 (PDF) - Supertex Inc

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HV623PG

32-Channel 128-Level Amplitude Gray-Shade Display Column Driver

Supertex Inc 

Output Stage Detail

VCTL

RCTL

VR

VPP

CH

Internal

Logic

&

Bias

Circuit

Q1

HVOUT

Q2

Test Circuit

High-voltage Analog Output Source Current (I )

AOH

For gray shade #1 (000 0000)

VR

VPP = 80V

HV623

HV623

+–

70V

0V

Logic

LVGND

Output

Stage

HVGND

HVOUT

+

1KΩ Vtst

-

10KΩ

1. Set HVOUT = Low.

2. Apply VPP = 80V.

3. Apply a step voltage of 70V at VR (slew rate = 4.1V/µs).

4. Measure voltage across the 1KΩ resistor.

5.

Output

source

current

can

be

calculated

by

using

Vtst

1K

.

Functional Block Diagram

VCTL

RCTL

1

2

Dual

16-bit

Shift Registers

L/E Data

7

Latches and 7

Latches

Comparators

L/E Data

7

Latches and 7

Latches

Comparators

See Output Stage Detail

GND

VR VPP

RS

F/F

Output

Stage

HVOUT 1

RS

F/F

Output

Stage

HVOUT 2

DIR

I/O

Buffers

31

32

SC

SC

I/O

Buffers

Shift

Clock

Buffer

L/E Data

Latches

L/E Data

Latches

Data In

Buffers

7

Latches and 7

Comparators

RS

F/F

Output

Stage

HVOUT 31

7

Latches and 7

Comparators

RS

F/F

Output

Stage

HVOUT 32

Clear

7

Count

Counter

CC

Load

Reset

Counter

Clear

Pulse

Generator

Load

Count

Buffer

Count

Clock

Buffer

CSI

CSO

SC

D7

D1

LC

CC

SC = Shift Clock

LC = Load Count

CC = Count Clock

CSI = Chip Select Input

CSO = Chip Select Output

*Strobe = twice the SC frequency

12-126

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