HV6810PJ-G(2013) 데이터 시트보기 (PDF) - Supertex Inc
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HV6810PJ-G Datasheet PDF : 9 Pages
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Supertex inc.
HV6810
10-Channel, Serial-Input
Latched Display Driver
Features
►►High output voltage 80V
►►High speed 5MHz @5.0VDD
►►Low power IBB ≤ 0.1mA (all high)
►►Active pull down 100µA min @25OC
►►Output source current 25mA @60V VBB
►►Each device drives 10 lines
►►High-speed serially-shifted data input
►►5.0V CMOS-compatible inputs
►►Latches on all driver outputs
►►Pin-compatible replacement for UCN5810A and
TL4810A, TL4810B
Applications
►► High speed dot matrix print head driver
►► VFD (vacuum fluorescent display) driver
General Description
The HV6810 is a monolithic integrated circuit designed
to drive a dot matrix or segmented vacuum fluorescent
display (VFD). These devices feature a serial data output to
cascade additional devices for large displays.
A 10-bit data word is serially loaded into the shift register
on the positive-going transition of the clock. Parallel data
is transferred to the output buffers through a 10-bit D-type
latch while the latch enable input is high, and is latched
when the latch enable is low. When the blanking input is
high, all of the outputs are low.
Outputs are structures formed by double-diffused MOS
(DMOS) transistors with output voltage ratings of 80V and
25mA source-current capability. All inputs are compatible
with CMOS levels.
Functional Block Diagram
Blanking
Latch Enable
Data Input
Clock
Shift Register
1D
C1
VBB
Latches
C2 LC1
2D
Q1
1D
C1
••• •••
1D
C1
C2 LC2
2D
Q2
6 Stages
•••
•••
•••
(Q3 thru Q8
not shown
C2 LC9
2D
Q9
1D
C2 LC10
C1
2D
Logic Diagram (positive logic)
Q10
Serial
Out
Doc.# DSFP-HV6810
E070913
Supertex inc.
www.supertex.com
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