IA2910A-PDW40C 데이터 시트보기 (PDF) - InnovASIC, Inc

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IA2910A-PDW40C

Microprogram Controller

InnovASIC, Inc 

IA2910A

Microprogram Controller

Page 2 of 19

Preliminary Data Sheet

The IA2910A is a form, fit and function compatible part to the AMD 2910A microprogram

controller. The IA2910A is an address controller which will sequence through a series of

microinstructions contained in a ROM or PROM. There are four sources of addresses from which

the IA2910A may select. The first is a direct data bus (DIN) input, which is straightforward. The

second is an internal address register. This register contains data loaded during a previous

microinstruction. The third source is a program counter register, which generally contains the

previous address incremented by one. The final source of addresses is a nine word deep stack

register which gives the capability to execute nested subroutine linkages. All internal registers are

clocked on the rising edge of the clock input (CLK). An OEn input enables the YOUT output bus

to be tri-stated. A block diagram is shown in Figure 1.

Functional Block Diagram

Figure 1

DIN

CLK

RLDn

Register/Counter

Stack Pointer

FULLn

Zero

Detector

9 word X 12 Bit

Stack

Mux

CCn

CCENn

Instruction

PLA

I(3:0)

PUSH/POP/

HOLD/CLEAR

CLEAR/COUNT

12

YOUT

Microprogram

counter-register

CIN

Incrementer

Copyright © 1999, InnovASIC Inc.

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