ICL7121LCJI 데이터 시트보기 (PDF) - Intersil
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ICL7121LCJI Datasheet PDF : 10 Pages
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Operational Amplifier Section
The input offset voltage, input current, gain, and bandwidth
of the op amps used affect the circuit performance. Since the
output impedance of IOUT varies with the digital input code,
the input current of amplifier A1 will cause a code-dependent
error at VOUT , degrading the linearity. The input bias current
should be significantly less than 1 LSB current, which is
about 10nA. In a similar manner, any offset voltage in A1 will
cause linearity errors. The offset voltage of the output
amplifier should be significantly less than 1 LSB (153µV at
VREF = 5V).
The voltage output setting time is highly dependent on the
slew rate and gain-bandwidth of A1, so for high speed
operation a high speed op amp such as the HA2600 is
recommended. For applications where high speed is not
required, the ICL7650 or ICL7652 can be used for A1. Since
the ICL7650/52 offset voltage is less than 5µV, no offset
trimming is needed. To get a full 5V output swing from these
op amps, ±7.5V supplies should be used for the ICL7650/52.
Amplifer A3, which is used to generate the inverted
reference, needs only to have a stable offset and to be able
to drive a 3kΩ load. Since this is strictly a DC amplifier, the
low noise ICL7652 is an ideal choice. Any variation in the
offset voltage of A3 will result in a drift in the bipolar zero, but
will not affect the linearity of the ICL7121.
Amplifier A3, used to generate a high quality ground, also
meeds a low offset and the ability to sink up to 2mA.
Grounding
Careful consideration must be given to grounding in any high
accuracy system. The current into the analog ground point
inside the chip varies signficantly with the input code value,
and the inevitable resistances between this point and any
external connection point can lead to signficant voltage drop
errors. For this reason, two separate leads are brought out
from this point on the IC: AGNDS and AGNDF. The varying
current should be absorbed through the AGNDF pin, and the
AGNDS pin will then accurately reflect the voltage on the
internal current summing point, as shown in Figure 6. Output
signals should ideally be referenced to the sense pin
AGNDS, as shown in the application circuits.
Multiplying Mode Performance
While the ICL7121 can perform full four-quadrant
muliplication, full 0.003% linearity is guaranteed only at
VREF = +5V. This is because the voltage coefficient of
resistance of the R-2R ladder and the feedback resistor are
significant at the 14-bit or 16-bit level. This effect is most
significant at high voltages, and adds errors on the order of
0.01% for a ±10V full-scale. While the ICL7121 is tested and
specified for VREF = +5V, the R-2R ladder has the same
voltage across it when VREF = -5V. Therefore, voltage
coefficients do not add any error with a -5V reference
voltage.
FIGURE 6. GROUND CONNECTIONS
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