ICS307-03
SERIALLY PROGRAMMABLE CLOCK SOURCE
Table 6. Output Divider for Output 2
Divide Value
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
Bits
117 116 115 114 113 Rule
1
1
1
1
0 output divide = ([117..114]+2)*2^[113])
1
1
1
1
1
1
1
1
0
1
1
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
0
1
1
0
0
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
0
1
0
1
0
1
1
0
1
0
0
1
0
0
1
1
1
0
0
1
0
1
0
0
0
1
1
0
0
0
0
1
Table 7. Output Divider for Output 3
Divide Value
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
Bits
121 120 119 118
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
1
1
1
0
0
1
0
1
1
1
0
1
0
1
0
0
1
1
0
0
0
0
1
1
1
0
1
1
0
0
1
0
1
0
1
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
0
0
0
94 Rule
0 output divide = ([121..118]+2)*2^[94])
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
MDS 307-03 C
6
Revision 101705
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