ICS601-21 데이터 시트보기 (PDF) - Integrated Circuit Systems
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ICS601-21 Datasheet PDF : 6 Pages
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ICS601-21
LOW PHASE NOISE CLOCK MULTIPLIER
Pin Assignment
Multiplier Select Table
X1 1
VDD
2
VDD
3
VDD
4
GND
5
VDD
6
GND
7
GND 8
16
X2
15
GND
14
CLK
13
nCLK
12
VDD
11
S0
10
S1
9 S2
16 Pin (173 m il) TSSOP
Pin Descriptions
S2
S1
S0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Multiplier
x1
x2
x3
x4
x5
x6
x8
x16
0 = connect directly to ground
1 = connect directly to VDD
Pin
Number
1
2-4
5
6
7-8
9
10
11
12
13
14
15
16
Pin
Name
X1
VDD
GND
VDD
GND
S2
S1
S0
VDD
nCLK
CLK
GND
X2
Pin
Type
XI
Power
Power
Power
Power
Input
Input
Input
Power
Output
Output
Power
XO
Pin Description
Crystal or clock input. Connect to a 10-27 MHz fundamental parallel mode
crystal or clock input.
Connect to +3.3 V.
Connect to ground.
Connect to +3.3 V.
Connect to ground.
Select pin 2. Internal pull-up resistor.
Select pin 1. Internal pull-up resistor.
Select pin 0. Internal pull-up resistor.
Connect to +3.3 V.
Inverted differential clock output.
Differential clock output.
Connect to ground.
Crystal connection. Connect to 10-27MHz fundamental parallel mode crystal
or leave unconnected for clock input.
MDS 601-21 H
2
Revision 040204
Integrated Circuit Systems l 525 Race Street, San Jose, CA 95126 l tel (408) 297-1201 l www.icst.com
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