ICS84326AM 데이터 시트보기 (PDF) - Integrated Circuit Systems
부품명
상세내역
제조사
ICS84326AM
Integrated Circuit Systems
ICS84326AM Datasheet PDF : 15 Pages
| |||
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS84326
CRYSTAL-TO-3.3V LVPECL
SERIAL ATTACHED SCSI CLOCK SYNTHESIZER/FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
Q0, nQ0 Output
Differential output pair. LVPECL interface levels.
3, 4
Q1, nQ1 Output
Differential output pair. LVPECL interface levels.
5, 6
Q2, nQ2 Output
Differential output pair. LVPECL interface levels.
7, 8
Q3, nQ3 Output
Differential output pair. LVPECL interface levels.
9, 10
Q4, nQ4 Output
Differential output pair. LVPECL interface levels.
11, 12
Q5, nQ5 Output
Differential output pair. LVPECL interface levels.
13, 24
16
14
15
VCCO
VCC
V
EE
PLL_SEL
Power
Power
Input
Pullup
Output supply pins.
Core supply pin.
Negative supply pin.
Selects between the PLL and crystal inputs as the input to the
dividers. When HIGH, selects PLL. When LOW, selects XTAL1, XTAL2.
LVCMOS / LVTTL interface levels.
17
18, 22
V
CCA
nc
Power
Unused
Analog supply pin.
No connect.
19, 20 XTAL2, XTAL1 Input
Crystal oscillator interface. XTAL1 is the input. XTAL2 is the output.
Active High Master Reset. When logic HIGH, the internal dividers
21
MR
Input
Pulldown
are reset causing the true outputs Qx to go low, and the inverted
outputs nQx to go high. When logic LOW, the internal dividers and
the outputs are enabled. LVCMOS / LVTTL interface levels.
23
F_SEL
Input Pullup Output frequency select pin. LVCMOS / LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLUP
RPULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
51
51
Maximum
4
Units
pF
KΩ
KΩ
84326AM
www.icst.com/products/hiperclocks.html
2
REV. A MARCH 10, 2003
Share Link: