IDT54FCT162841AT 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT54FCT162841AT Datasheet PDF : 9 Pages
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IDT54/74FCT16841AT/BT/CT/ET, 162841AT/BT/CT/ET
FAST CMOS 20-BIT TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16841AT/162841AT
FCT16841BT/162841BT
Symbol
Parameter
Condition(1)
Com'l.
Min.(2) Max.
Mil.
Min.(2) Max.
Com'l.
Min.(2) Max.
Mil.
Min.(2) Max.
Unit
tPLH Propagation Delay
CL = 50pF
1.5 9.0 1.5 10.0 1.5 6.5 1.5 7.5 ns
tPHL xDx to xQx
RL = 500Ω
(LE = HIGH)
CL = 300pF(5) 1.5 13.0 1.5 15.0 1.5 13.0 1.5 15.0
RL = 500Ω
tPLH Propagation Delay
CL = 50pF
1.5 12.0 1.5 13.0 1.5 8.0 1.5 10.5 ns
tPHL xLE to xQx
RL = 500Ω
CL = 300pF(5) 1.5 16.0 1.5 20.0 1.5 15.5 1.5 18.0
RL = 500Ω
tPZH Output Enable Time
tPZL xOE to xQx
CL = 50pF
RL = 500Ω
1.5 11.5 1.5 13.0 1.5 8.0 1.5 8.5 ns
CL = 300pF(5) 1.5 23.0 1.5 25.0 1.5 14.0 1.5 15.0
RL = 500Ω
tPHZ Output Disable Time
tPLZ xOE to xQx
CL = 5pF(5)
RL = 500Ω
1.5 7.0 1.5 9.0 1.5 6.0 1.5 6.5 ns
CL = 50pF
1.5 8.0 1.5 10.0 1.5 7.0 1.5 7.5
RL = 500Ω
tSU Set-Up Time HIGH or LOW,
CL = 50pF
2.5
—
2.5
—
2.5
—
2.5
— ns
xDx to xLE
RL = 500Ω
tH
Hold Time HIGH or LOW,
2.5
—
3.0
—
2.5
—
2.5
— ns
xDx to xLE
tW
xLE Pulse Width HIGH
4.0(4) —
5.0
—
4.0(4)
—
4.0(4) —
ns
tSK(o) Output skew(3)
—
0.5
—
0.5
—
0.5
—
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
5. This condition is guaranteed but not tested.
0.5 ns
2556 tbl 09
5.18
6
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