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6116LA(2001) 데이터 시트보기 (PDF) - Integrated Device Technology

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6116LA
(Rev.:2001)
IDT
Integrated Device Technology IDT
6116LA Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
IDT6116SA/LA
CMOS Static RAM 2K (16K x 8-Bit)
Military, Commercial, and In dustrial Temperature Ranges
Timing Waveform of Read Cycle No. 1(1,3)
tRC
ADDRESS
OE
CS
DATAOUT
ICC
VCC
Supply
Currents
ISB
tAA
tOE
tOLZ (5)
tACS
tCLZ (5)
tPU
tOH
tOHZ (5)
tCHZ (5)
DATA
VALID
tPD
,
3089 drw 06
Timing Waveform of Read Cycle No. 2(1,2,4)
tRC
ADDRESS
tAA
tOH
DATAOUT
PREVIOUS DATA VALID
tOH
DATA VALID
,
3089 drw 07
Timing Waveform of Read Cycle No. 3(1,3,4)
CS
DATAOUT
tCLZ (5)
tACS
NOTES:
1. WE is HIGH for Read cycle.
2. Device is continously selected, CS is LOW.
3. Address valid prior to or coincident with CS transition LOW.
4. OE is LOW.
5. Transition is measured ±500mV from steady state.
6.472
tCHZ (5)
DATA VALID
,
3089 drw 08

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