IDT71128S12Y 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT71128S12Y Datasheet PDF : 8 Pages
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IDT71128 CMOS Static RAM
1 Meg (256K x 4-bit) Revolutionary Pinout
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(VCC = 5.0V ± 10%, Commercial and Industrial Temperature Ranges)
71128S12
71128S15
Symbol
Parameter
Min. Max. Min. Max.
READ CYCLE
tRC
Read Cycle Time
12
____
15
____
tAA
Address Access Time
____
12
____
15
tACS
Chip Select Access Time
____
12
____
15
tCLZ(1)
Chip Select to Output in Low-Z
3
____
3
____
tCHZ(1)
Chip Deselect to Output in High-Z
0
6
0
7
tOE
Output Enable to Output Valid
____
6
____
7
tOLZ(1)
Output Enable to Output in Low-Z
0
____
0
____
tOHZ(1)
Output Disable to Output in High-Z
0
5
0
5
tOH
Output Hold from Address Change
4
____
4
____
tPU(1)
Chip Select to Power-Up Time
0
____
0
____
tPD(1)
Chip Deselect to Power-Down Time
____
12
____
15
WRITE CYCLE
tWC
Write Cycle Time
12
____
15
____
tAW
Address Valid to End of Write
10
____
12
____
tCW
Chip Select to End of Write
10
____
12
____
tAS
Address Set-up Time
0
____
0
____
tWP
Write Pulse Width
10
____
12
____
tWR
Write Recovery Time
0
____
0
____
tDW
Data Valid to End-of-Write
7
____
8
____
tDH
Data Hold Time
0
____
0
____
tOW(1)
Output active from End-of-Write
3
____
3
____
tWHZ(1)
Write Enable to Output in High-Z
0
5
0
5
NOTE:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
71128S20
Min. Max. Unit
20
____
ns
____
20
ns
____
20
ns
3
____
ns
0
8
ns
____
8
ns
0
____
ns
0
7
ns
4
____
ns
0
____
ns
____
20
ns
20
____
ns
15
____
ns
15
____
ns
0
____
ns
15
____
ns
0
____
ns
9
____
ns
0
____
ns
4
____
ns
0
8
ns
3483 tbl 09
6.442
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