IDT7130SA100P 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT7130SA100P Datasheet PDF : 19 Pages
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IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM
Pin Configurations(1,2,3) (con't.)
01/08/02
INDEX
Military, Industrial and Commercial Temperature Ranges
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
I/O0L
I/O1L
I/O2L
I/O3L
7 6 5 4 3 2 52 51 50 49 48 47
8
1
46 OER
9
45 A0R
10
44 A1R
11
43 A2R
12
IDT7130/40J
J52-1(4)
42 A3R
13
14
52-Pin PLCC
Top View(5)
41 A4R
40 A5R
15
39 A6R
16
38 A7R
17
37 A8R
18
36 A9R
19
35 N/C
20
34 I/O7R
21 22 23 24 25 26 27 28 29 30 31 32 33
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2689 drw 04
01/08/02
INDEX
OEL 1
A0L
2
A1L
3
A2L
4
A3L
5
A4L
6
A5L
7
A6L
8
N/C 9
A7L 10
A8L 11
A9L 12
N/C 13
I/O0L 14
I/O1L 15
I/O2L 16
IDT7130/40TF or PF
PP64-1 & PN64-1(4)
64-Pin STQFP
64-Pin TQFP
Top View(5)
NOTES:
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. J52-1 package body is approximately .75 in x .75 in x .17 in.
PP64-1 package body is approximately 10 mm x 10 mm x 1.4mm.
PN64-1 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
3
48 OER
47 A0R
46 A1R
45 A2R
44 A3R
43 A4R
42 A5R
41 A6R
40 N/C
39 A7R
38 A8R
37 A9R
36 N/C
35 N/C
34 I/O7R
33 I/O6R
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2689 drw 05
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