H1109(1997) 데이터 시트보기 (PDF) - Intersil
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H1109 Datasheet PDF : 12 Pages
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HFA1109
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier’s bandwidth depen-
dency on closed loop gain isn’t as severe as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s
unique relationship between bandwidth and RF. All current
feedback amplifiers require a feedback resistor, even for
unity gain applications, and RF, in conjunction with the inter-
nal compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to RF. The HFA1109 design is opti-
mized for a 250Ω RF at a gain of +2. Decreasing RF
decreases stability, resulting in excessive peaking and over-
shoot (Note: Capacitive feedback will cause the same prob-
lems due to the feedback impedance decrease at higher
frequencies). At higher gains the amplifier is more stable, so
RF can be decreased in a trade-off of stability for bandwidth.
TABLE 1. OPTIMUM FEEDBACK RESISTOR
GAIN (ACL)
-1
+1
+2
RF (Ω)
200
250 (+RS = 550Ω) PDIP
250 (+RS = 700Ω) SOIC
250
BANDWIDTH (MHz)
400
350
450
+5
100
160
+10
90
70
Table 1 lists recommended RF values, and the expected
bandwidth, for various closed loop gains. For a gain of +1, a
resistor (+RS) in series with +IN is required to reduce gain
peaking and increase stability
ble oscillations. In most cases, the oscillation can be avoided
by placing a resistor (RS) in series with the output prior to
the capacitance.
RS and CL form a low pass network at the output, thus limit-
ing system bandwidth well below the amplifier bandwidth. By
decreasing RS as CL increases, the maximum bandwidth is
obtained without sacrificing stability. In spite of this, band-
width still decreases as the load capacitance increases.
Evaluation Board
The performance of the HFA1109 may be evaluated using
the HFA11XX evaluation board (part number
HFA11XXEVAL). Please contact your local sales office for
information. When evaluating this amplifier, the two 510Ω
gain setting resistors on the evaluation board should be
changed to 250Ω.
The layout and schematic of the board are shown in Figure 1.
.
BOARD SCHEMATIC
510Ω
50Ω
IN
10µF 0.1µF
510Ω
1
2
3
4
-5V
VH
8
7
6
5
GND
0.1µF
50Ω
10µF
+5V
OUT
VL
GND
TOP LAYOUT
PC Board Layout
The frequency response of this amplifier depends greatly on
the care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid ground
plane is a must! Attention should be given to decoupling the
power supplies. A large value (10µF) tantalum in parallel with a
small value (0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to ground
seen by the amplifier’s inverting input (-IN). The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and possible instability. Thus it is recommended that
the ground plane be removed under traces connected to -IN,
and connections to -IN should be kept as short as possible.
VH
1
+IN
OUT V+
VL V-
GND
BOTTOM LAYOUT
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly ter-
minated transmission line will degrade the amplifier’s phase
margin resulting in frequency response peaking and possi-
FIGURE 1. EVALUATION BOARD SCHEMATIC AND LAYOUT
5
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