IDT71V256SA10YGI8 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT71V256SA10YGI8

Lower Power 3.3V CMOS Fast SRAM 256K (32K x 8-Bit)

Integrated Device Technology 

Lower Power

3.3V CMOS Fast SRAM

256K (32K x 8-Bit)

IDT71V256SA

Features

◆ Ideal for high-performance processor secondary cache

◆ Commercial (0°C to +70°C) and Industrial (–40°C to +85°C)

temperature range options

◆ Fast access times:

– Commercial and Industrial: 10/12/15/20ns

◆ Low standby current (maximum):

– 2mA full standby

◆ Small packages for space-efficient layouts:

– 28-pin 300 mil SOJ

– 28-pin TSOP Type I

◆ Produced with advanced high-performance CMOS

technology

◆ Inputs and outputs are LVTTL-compatible

◆ Single 3.3V(±0.3V) power supply

Description

The IDT71V256SA is a 262,144-bit high-speed static RAM organized

as 32K x 8. It is fabricated using IDT’s high-performance, high-reliability

CMOS technology.

The IDT71V256SA has outstanding low power characteristics while

at the same time maintaining very high performance. Address access

times of as fast as 10ns are ideal for 3.3V secondary cache in 3.3V

desktop designs.

When power management logic puts the IDT71V256SA in standby

mode, its very low power characteristics contribute to extended battery life.

By taking CS HIGH, the SRAM will automatically go to a low power standby

mode and will remain in standby as long as CS remains HIGH. Further-

more, under full standby mode (CS at CMOS level, f=0), power consump-

tion is guaranteed to always be less than 6.6mW and typically will be much

smaller.

The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin

300 mil TSOP Type I.

Functional Block Diagram

A0

A14

I/O0

I/O7

CS

OE

WE

ADDRESS

DECODER

INPUT

DATA

CIRCUIT

CONTROL

CIRCUIT

262,144 BIT

MEMORY ARRAY

I/O CONTROL

VCC

GND

,

3101 drw 01

1

©2004 Integrated Device Technology, Inc.

JANUARY 2004

DSC-3101/08

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