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IDT74FCT2373ATQG 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT74FCT2373ATQG
IDT
Integrated Device Technology IDT
IDT74FCT2373ATQG Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
IDT74FCT2373AT/CT
FAST CMOS OCTAL TRANSPARENT LATCH
TEST CIRCUITS AND WAVEFORMS
INDUSTRIAL TEMPERATURE RANGE
VIN
Pulse
Generator
V CC
D.U.T
.
RT
VOUT
500W
50pF
500W
CL
Octal Link
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
DATA
INPUT
tSU
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
ETC.
tH
tREM
tH
Set-Up, Hold, and Release Times
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
Octal Link
LOW-HIGH-LOW
PULSE
tW
HIGH-LOW-HIGH
PULSE
Pulse Width
1.5V
1.5V
Octal Link
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
tPHL
OPPOSITE PHASE
INPUT TRANSITION
Propagation Delay
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
Octal Link
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
DISABLE
3V
1.5V
0V
tPLZ
3.5V
3.5V
1.5V
tPHZ
0.3V VOL
1.5V
0.3V VOH
0V
0V
Octal Link
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
6

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