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IZ74LV74 데이터 시트보기 (PDF) - Integral Corp.
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IZ74LV74
Dual D-type flip-flop with set and reset; positive-edge trigger
Integral Corp.
IZ74LV74 Datasheet PDF : 7 Pages
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CHIP PAD DIAGRAM
Chip marking
25LV74
12
11 10
09
13
08
14
01
07
IN74LV74
02
03
04 05
06
Y
(0,0)
1.32 + 0.03
X
Location of marking (mm):
left lower corner x=0.520, y=0.865.
Chip thickness:
0.46
±
0.02 mm.
PAD LOCATION
Pad No
Symbol
Location (left lower corner), mm
X
Y
01
Reset 1
0.118
02
Data 1
0.118
03
Clock 1
0.286
04
Set 1
0.597
05
Q1
0.895
06
Q1
1.100
07
GND
1.100
08
Q2
1.100
09
Q2
1.100
10
Set 2
0.851
11
Clock 2
0.540
12
Data 2
0.297
13
Reset 2
0.118
14
V
CC
0.118
0.436
0.125
0.125
0.125
0.125
0.125
0.423
0.721
0.930
0.949
0.949
0.949
0.830
0.604
Note: Pad location is given as per metallization layer
Pad size, mm
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
0.108 x 0.108
INTEGRAL
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