IS25F011A 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS25F011A

1M-BIT, 2M-BIT, AND 4M-BIT SERIAL FLASH MEMORIES WITH 4-PIN SPI INTERFACE

Integrated Silicon Solution 

IS25F011A

IS25F021A

IS25F041A

ISSI ®

ST7 ST6 ST5 ST4 ST3 ST2 ST1 ST0

1

x =RESERVED Busy TR X WE CNE X X X

2

READ/BUSY

3

SRAM AND PROGRAM

BUFFER TRANSFER

FLASH ARRAY WRITE

ENABLE/DISABLE

4

SECTOR-SRAM

COMPARE NOT EQUAL

5

Figure 8. Status Register Bit Locations

6

Compare Not Equal, CNE

The CNE status bit is located at bit ST[3] of the status

register. The bit provides a cumulative comparison result

during a Compare Sector with SRAM command. The CNE

bit is reset to a 0 upon power-up or after a Clear Compare

Bit command is executed.

CNE=1 Sector and SRAM contents are not equal.

CNE=0 Sector and SRAM are equal or CNE bit reset.

Command Set

The IS25F011A, IS25F021A, and IS25F041A have a

powerful command set that is fully controlled through the

SPI bus. Command relations are shown in Figure 5 and

a list of commands and their associated address, status,

clock, and data bytes are shown in Table 3. Detailed

clock timing of the Read Sector and Write Sector com-

mand sequences are shown in Figures 10 and 11.

7

8 After power up, a device enters an idle state that will

maintain until CS pin is asserted low. All commands are

entered from the SPI serial data input (SI) pin on the rising

edge of SCK while CS is asserted low. All command,

9 address, and configuration bits are shifted into the device

with most-significant-bit-first. Data bits read from the

device are shifted out with least significant byte first

(i.e., byte-00H, byte-01H,...). The bit order within each

10 byte is most-significant-bit first (i.e.,D7,...D0). All com-

mands are completed by asserting the CS pin high.

Note that the entire 264-byte contents of a Flash sector,

11 the SRAM, or Program Buffer does not have to be

accessed all at once. Read, Write, Transfer, and Com-

pare commands allow for byte addressing. Thus a single

byte, or clocked sequence of bytes, can be accessed at

12 any starting location within the 264-byte boundary as

specified by the byte-address field.

Integrated Silicon Solution, Inc.

9

PRELIMINARY SF001-1A

06/24/98

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