IS61NLF12836A-6.5B3I 데이터 시트보기 (PDF) - Integrated Silicon Solution

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IS61NLF12836A-6.5B3I

128K x 36 and 256K x 18 4Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM

Integrated Silicon Solution 

IS61NLF12836A/IS61NVF12836A

IS61NLF25618A/IS61NVF25618A

ISSI ®

165-PIN PBGA PACKAGE CONFIGURATION 256K x 18 (TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

A NC

A

CE

BWb

NC

CE2

CKE

ADV

NC

A

A

B NC

A

CE2 NC

BWa CLK

WE

OE

A

A

NC

C NC

NC

VDDQ Vss

Vss Vss

Vss

Vss VDDQ NC DQPa

D NC DQb VDDQ VDD

Vss Vss

Vss

VDD

VDDQ

NC

DQa

E NC DQb VDDQ VDD

Vss Vss

Vss

VDD VDDQ

NC

DQa

F

NC

DQb VDDQ VDD

Vss Vss

Vss

VDD

VDDQ

NC

DQa

G

NC

DQb

VDDQ VDD

Vss Vss

Vss

VDD

VDDQ

NC

DQa

H NC VDD

NC VDD

Vss

Vss

Vss

VDD

NC

NC

ZZ

J

DQb

NC

VDDQ VDD

Vss

Vss

Vss

VDD

VDDQ

DQa

NC

K DQb NC VDDQ VDD

Vss

Vss

Vss

VDD

VDDQ

DQa

NC

L DQb NC VDDQ VDD

Vss Vss

Vss

VDD

VDDQ

DQa

NC

M DQb NC VDDQ VDD

Vss Vss

Vss

VDD VDDQ

DQa

NC

N DQPb NC VDDQ Vss

NC

NC

NC

Vss VDDQ

NC

NC

P NC NC

A

A

NC

A1* NC

A

A

A

NC

R MODE NC

A

A

NC

A0*

NC

A

A

A

A

Note: A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.

PIN DESCRIPTIONS

Symbol

Pin Name

A

Address Inputs

A0, A1

Synchronous Burst Address Inputs

ADV

WE

Synchronous Burst Address Advance/

Load

Synchronous Read/Write Control Input

CLK

Synchronous Clock

CKE

Clock Enable

CE, CE2, CE2 Synchronous Chip Enable

BWx (x=a,b)

OE

Synchronous Byte Write Inputs

Output Enable

ZZ

Power Sleep Mode

MODE

VDD

NC

DQx

DQPx

VDDQ

VSS

Burst Sequence Selection

3.3V/2.5V Power Supply

No Connect

Data Inputs/Outputs

Parity Data I/O

Isolated output Power Supply

3.3V/2.5V

Ground

6

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

Rev. 00A

08/26/05

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