IS62C1024L 데이터 시트보기 (PDF) - Integrated Silicon Solution
부품명
상세내역
제조사
IS62C1024L Datasheet PDF : 11 Pages
| |||
IS62C1024L
ISSI ®
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
Test Conditions
-35 ns
-70 ns
Min. Max. Min. Max.
Unit
ICC
VDDDynamicOperating VDD=Max.,CE =VIL
Com.
Supply Current
IOUT = 0 mA, f = fMAX
Ind.
— 100 — 70
mA
— 110 — 80
ISB1
TTL Standby Current
VDD = Max.,
Com.
(TTL Inputs)
VIN =VIHorVIL, CE1 ≥ VIH, Ind.
or CE2 ≤ VIL, f = 0
— 10
— 10
mA
— 15
— 15
ISB2
CMOS Standby
VDD = Max.,
Com.
Current(CMOSInputs) CE1≤VDD–0.2V,
Ind.
CE2 ≤ 0.2V, VIN ≥ VDD – 0.2V,
or VIN ≤ 0.2V, f = 0
— 500 — 500
µA
— 750 — 750
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol
tRC
tAA
tOHA
tACE1
tACE2
tDOE
tLZOE(2)
tHZOE(2)
tLZCE1(2)
tLZCE2(2)
tHZCE(2)
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1 Access Time
CE2 Access Time
OE Access Time
OE to Low-Z Output
OE to High-Z Output
CE1 to Low-Z Output
CE2 to Low-Z Output
CE1 or CE2 to High-Z Output
-35
-70
Min. Max.
Min. Max.
Unit
35 —
70 —
ns
— 35
— 70
ns
3—
3—
ns
— 35
— 70
ns
— 35
— 70
ns
— 10
— 35
ns
0—
0—
ns
0 10
0 25
ns
3—
10 —
ns
3—
10 —
ns
0 10
0 25
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. E
11/26/03
Share Link: 