5811U 데이터 시트보기 (PDF) - Intersil

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5811U

Single Digitally Controlled Potentiometer (XDCP™)

Intersil 

ISL95811

Analog Specifications Over recommended operating conditions unless otherwise stated. (Continued)

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

(Note 18) (Note 4) (Note 18) UNIT

RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)

RINL (Note 14) Integral Non-Linearity

DCP register set between 1 hex W option -3

and FF hex. Monotonic over all

tap positions.

U option

-1

3

MI

(Note 11)

1

MI

(Note 11)

RDNL (Note 13) Differential Non-Linearity

DCP register set between 1 hex

and FF hex. Monotonic over all

tap positions

W option

U option

-0.75

-0.5

0.75

MI

(Note 11)

0.5

MI

(Note 11)

Roffset (Note 12) Offset

W option

0

1

5

MI

(Note 11)

U option

0

0.5

2

MI

(Note 11)

TCR

Resistance Temperature

(Note 15, 16) Coefficient

DCP register set between 20 hex and FF

hex

±45

ppm/°C

Operating Specifications Over the recommended operating conditions unless otherwise specified.

SYMBOL

ICC1

ICC2

ISB

ILkgDig

PARAMETER

TEST CONDITIONS

VCC Supply Current

(Volatile Write/Read)

fSCL = 400kHz; SDA = Open; (for I2C, Active,

Read and Volatile Write States only)

VCC Supply Current

(Non-volatile Write)

fSCL = 400kHz; SDA = Open; (for I2C, Active,

Non-volatile Write State only)

VCC Current (Standby)

VCC = +5.5V, I2C Interface in Standby State

VCC = +3.6V, I2C Interface in Standby State

Leakage Current, at Pins SDA, SCL, Voltage at pin from GND to VCC

and WP Pins

MIN

TYP MAX

(Note 18) (Note 4) (Note 18) UNITS

100

µA

2

mA

10

µA

5

µA

-1

1

µA

tDCP

DCP Wiper Response Time

SCL falling edge of last bit of DCP Data

Byte to wiper change

1

µs

Vpor

VCCRamp

tD

Power-On Recall Voltage

VCC Ramp Rate

Power-Up Delay

Minimum VCC at which memory recall occurs

1.8

0.2

VCC above VPOR, to DCP Initial Value Register

recall completed, and I2C Interface in standby

state

2.6

V

V/ms

3

ms

EEPROM SPECIFICATIONS

EEPROM Endurance

1,000,000

Cycles

EEPROM Retention

Temperature ≤ +55°C

50

Years

SERIAL INTERFACE SPECIFICATIONS

VIL

WP, SDA, and SCL Input Buffer LOW

Voltage

-0.3

0.3*VCC V

VIH

WP, SDA, and SCL Input Buffer

HIGH Voltage

0.7*VCC

VCC + V

0.3

Hysteresis (Note 16) SDA and SCL Input Buffer Hysteresis

VOL

SDA Output Buffer LOW Voltage,

Sinking 4mA

0.05*VCC

0

V

0.4

V

Cpin (Note 16) WP, SDA, and SCL Pin Capacitance

10

pF

4

FN6759.1

October 6, 2008

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