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K4S643233F 데이터 시트보기 (PDF) - Samsung

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K4S643233F Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
K4S643233F-S(D)E/N/I/P
CMOS SDRAM
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
Symbol
CAS latency=3
CLK cycle time
CAS latency=2 tC C
CAS latency=1
CAS latency=3
CLK to valid output delay CAS latency=2 tSAC
CAS latency=1
CAS latency=3
Output data hold time
CAS latency=2 tOH
CAS latency=1
CLK high pulse width
tC H
CLK low pulse width
tC L
Input setup time
tS S
Input hold time
tSH
CLK to output in Low-Z
tSLZ
CAS latency=3
CLK to output in Hi-Z
CAS latency=2 tSHZ
CAS latency=1
- 75
Min
Max
7.5
9.5
1000
-
5.4
7
-
2.5
2.5
-
2.5
2.5
2.0
1.0
1
5.4
7
-
-1H
Min
Max
9.5
9.5
1000
-
7
7
-
2.5
2.5
-
3
3
2.5
1.5
1
7
7
-
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
-1L
Min
Max
9.5
12
1000
25
7
8
20
2.5
2.5
2.5
3
3
2.5
1.5
1
7
8
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1,2
2
3
3
3
3
2
Notes :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life
is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of
a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea
repeater use.
Rev. 1.5 Dec. 2002

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