DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

K5L5628JTM 데이터 시트보기 (PDF) - Samsung

부품명
상세내역
제조사
K5L5628JTM Datasheet PDF : 98 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
K5L5628JT(B)M
PPrreelliimmiinnaarryy
MCP MEMORY
Multi-Chip Package MEMORY
256M Bit (16M x16) Synchronous Burst , Multi Bank NOR Flash / 128M Bit(8M x16) Synchronous Burst UtRAM
FEATURES
<Common>
Handshaking Feature
Operating Temperature : -30°C ~ 85°C
- Provides host system with minimum latency by monitoring
Package : 115Ball FBGA Type - 8.0mm x 12.0mm
RDY
0.8mm ball pitch
Erase Suspend/Resume
1.4mm (Max.) Thickness
Program Suspend/Resume
<NOR Flash>
Unlock Bypass Program/Erase
Single Voltage, 1.7V to 1.95V for Read and Write operations Hardware Reset (RESET)
Organization
Data Polling and Toggle Bits
- 16,772,216 x 16 bit ( Word Mode Only)
- Provides a software method of detecting the status of program
Read While Program/Erase Operation
or erase completion
Multiple Bank Architecture
Endurance
- 16 Banks (16Mb Partition)
100K Program/Erase Cycles Minimum
OTP Block : Extra 256Byte block
Data Retention : 10 years
Read Access Time (@ CL=30pF)
Support Common Flash Memory Interface
- Asynchronous Random Access Time :
Low Vcc Write Inhibit
90ns (54MHz) / 80ns (66MHz)
- Synchronous Random Access Time :
88.5ns (54MHz) / 70ns (66MHz)
- Burst Access Time :
14.5ns (54MHz) / 11ns (66MHz)
Burst Length :
- Continuous Linear Burst
- Linear Burst : 8-word & 16-word with No-wrap & Wrap
Block Architecture
- Eight 4Kword blocks and five hundreds eleven 32Kword
blocks
<UtRAM>
Process Technology: CMOS
Organization: 8M x16 bit
Power Supply Voltage: VCC 2.5~2.7V, VCCQ 1.7~2.0V
Three State Outputs
Supports MRS (Mode Register Set)
MRS control - MRS Pin Control
Supports Power Saving modes - Partial Array Refresh mode
Internal TCSR
Supports Driver Strength Optimization for system environment
power saving.
- Bank 0 contains eight 4 Kword blocks and thirty-one 32Kword Supports Asynchronous 4-Page Read and Asynchronous Write
blocks
Operation
- Bank 1 ~ Bank 15 contain four hundred eighty 32Kword blocks Supports Synchronous Burst Read and Synchronous Burst
Reduce program time using the VPP
Support Single & Quad word accelerate program
Power Consumption (Typical value, CL=30pF)
- Burst Access Current : 30mA
- Program/Erase Current : 15mA
- Read While Program/Erase Current : 40mA
- Standby Mode/Auto Sleep Mode : 25uA
Block Protection/Unprotection
- Using the software command sequence
- Last two boot blocks are protected by WP=VIL
Write Operation
Synchronous Burst(Read/Write) Operation
- Supports 4 word / 8 word / 16 word and Full Page(256 word)
burst
- Supports Linear Burst type & Interleave Burst type
- Latency support : Latency 3 @ 52.9MHz(tCD 12ns)
- Supports Burst Read Suspend in No Clock toggling
- Supports Burst Write Data Masking by /UB & /LB pin control
- Supports WAIT pin function for indicating data availability.
Max. Burst Clock Frequency : 52.9MHz
- All blocks are protected by VPP=VIL
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
2
Revision 1.0
November 2004

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]