K6X4008T1F 데이터 시트보기 (PDF) - Samsung
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K6X4008T1F Datasheet PDF : 9 Pages
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K6X4008T1F Family
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load(see right): CL=100pF+1TTL
CL1)=30pF+1TTL
1. 55ns, 70ns product
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS
(VCC=2.7~3.6V, Commercial product: TA=0 to 70°C, Industrial product: TA=-40 to 85°C, Automotive product: TA=-40 to 125°C)
Speed Bins
Parameter List
Symbol
55ns1)
70ns
85ns
Min
Max
Min
Max
Min
Max
Read cycle time
tRC
55
-
70
-
85
-
Address access time
tAA
-
55
-
70
-
85
Chip select to output
tCO
-
55
-
70
-
85
Output enable to valid output
tOE
-
25
-
35
-
40
Read Chip select to low-Z output
tLZ
10
-
10
-
10
-
Output enable to low-Z output
tOLZ
5
-
5
-
5
-
Chip disable to high-Z output
tHZ
0
20
0
25
0
25
Output disable to high-Z output
tOHZ
0
20
0
25
0
25
Output hold from address change tOH
10
-
10
-
10
-
Write cycle time
tWC
55
-
70
-
85
-
Chip select to end of write
tCW
45
-
60
-
70
-
Address set-up time
tAS
0
-
0
-
0
-
Address valid to end of write
tAW
45
-
60
-
70
-
Write pulse width
Write
Write recovery time
tWP
40
-
55
-
55
-
tWR
0
-
0
-
0
-
Write to output high-Z
tWHZ
0
20
0
25
0
25
Data to write time overlap
tDW
25
-
30
-
35
-
Data hold from write time
tDH
0
-
0
-
0
-
End write to output low-Z
tOW
5
-
5
-
5
-
1. Voltage range is 3.0V~3.6V for commercial and industrial product.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
VDR
CS≥Vcc-0.2V
K6X4008T1F-B
Data retention current
IDR
Vcc=3.0V, CS≥Vcc-0.2V K6X4008T1F-F
K6X4008T1F-Q
Data retention set-up time
Recovery time
tSDR
tRDR
See data retention waveform
1. Typical values are measured at TA = 25°C and not 100% tested.
Min Typ1) Max Unit
2.0
-
3.6
V
-
10 µA
-
0.5
10
µA
-
20 µA
0
-
-
ms
5
-
-
5
Revision 1.0
September 2003
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