KM681001A 데이터 시트보기 (PDF) - Samsung
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KM681001A Datasheet PDF : 9 Pages
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KM681001A
WRITE CYCLE
Parameter
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width(OE High)
Write Pulse Width(OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
NOTE: tWR=tWR1, tWR2
PRELIMINARY
CMOS SRAM
Symbol
tWC
tCW
tAS
tAW
tWP
tWP1
tWR*
tWHZ
tDW
tDH
tOW
KM681001A-15
Min
Max
15
-
10
-
0
-
10
-
10
-
15
-
0
-
0
8
7
-
0
-
3
-
KM681001A-20
Unit
Min
Max
20
-
ns
12
-
ns
0
-
ns
12
-
ns
12
-
ns
20
-
ns
0
-
ns
0
10
ns
9
-
ns
0
-
ns
3
-
ns
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS1=OE=VIL, CS2=WE=VIH)
Address
Data Out
tRC
tAA
tOH
Previous Valid Data
Valid Data
-5-
Rev 5.0
February 1998
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