KS0072
PRELIMINARY SPECIFICATION
DOT MATRIX LCD CONTROLLER & DRIVER
Timing Generation Circuit
Timing generation circuit generates clock signals for the internal operations.
LCD Driver Circuit
LCD driver circuit has 16 common and 40 segment output signals for LCD driving.
Data from CGRAM/CGROM is transferred to 40-bit segment shift register in a serially, which is then it is stored
to 40-bit segment output latch. When each com is selected by a 16-bit common register, the segment data also
outputs through segment driver from 40-bit segment output latch.
Cursor/Blink Control Circuit
It controls cursor/blink ON/OFF at the cursor position.
LDI-97-D001
9
97-10-23