L4995
3
Application information
Application information
Figure 26. L4995 application schematic(1)
6I
6S
6O
%N
6CW
#TW
7I
3TART UP
6OLT AGE
2EFERENCE
6
M6 ?
WATCHDOG
#O
6O S
#O
GND
2ES
6CR
,OW 6O LTAGE
2ESET
#TR
'!0'-3
1. The input capacitor Cs > 200nF is necessary for the smoothing of line disturbances. The output capacitor
C01 > 100nF is necessary for the stability of the regulation loop. In order to dampen output voltage
oscillations during high load current surges, it is recommended an additional electrolytic capacitor C02 >
10µF to be placed at the output pin.
Figure 27. Stability region(1)
100
Unstable region
10
1
Stability region
0.1
ESR min
ESR max
0.01
Undefined region
0.001
0.5 5 10 15 20 25 30 35 40 45 50
Co (uF)
1. The curve which describes the minimum ESR is derived from characterization data on the regulator with
connected ceramic capacitors which feature low ESR values (at 100 kHz). Any capacitor with further lower
ESR than the given plot value must be evaluated in each and every case.
Doc ID 13103 Rev 13
17/35