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L6228Q(2008) 데이터 시트보기 (PDF) - STMicroelectronics

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L6228Q
(Rev.:2008)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
L6228Q Datasheet PDF : 32 Pages
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L6228Q
4
Circuit description
Circuit description
4.1
Power stages and charge pump
The L6228Q integrates two independent Power MOS Full Bridges. Each Power MOS has an
RDS(ON) = 0.73 (typical value @ 25 °C), with intrinsic fast freewheeling diode. Switching
patterns are generated by the PWM Current Controller and the Phase Sequence Generator
(see below). Cross conduction protection is achieved using a dead time (tDT = 1 µs typical
value) between the switch off and switch on of two Power MOSFETs in one leg of a bridge.
Pins VSA and VSB must be connected together to the supply voltage VS. The device
operates with a supply voltage in the range from 8 V to 52 V. It has to be noticed that the
RDS(ON) increases of some percents when the supply voltage is in the range from 8 V to 12 V.
Using N-Channel Power MOS for the upper transistors in the bridge requires a gate drive
voltage above the power supply voltage. The bootstrapped supply voltage VBOOT is obtained
through an internal Oscillator and few external components to realize a charge pump circuit
as shown in Figure 8. The oscillator output (VCP) is a square wave at 600 kHz (typical) with
10V amplitude. Recommended values/part numbers for the charge pump circuit are shown
in Table 6.
Table 6.
Charge pump external components values
CBOOT
CP
RP
D1
D2
220 nF
10 nF
100
1N4148
1N4148
Figure 8. Charge pump circuit
VS
D1
D2
CBOOT
RP
CP
VCP VBOOT
VSA VSB D01IN1328
11/32

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