LB11876 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LB11876
SANYO -> Panasonic
LB11876 Datasheet PDF : 15 Pages
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Pin Assignment
LB11876
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
LB11876
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18
Pin Functions
Pin No.
Pin
Description
1
CLK
External clock signal input
Low : 0V to 1.0V
High : 2.0V to VREG
This pin goes to the high level when open.
Hysteresis : about 0.21V
f = 10kHz (maximum)
Top view
VREG
Equivalent Circuit
50kΩ
5kΩ
1
2
FGS
FG Schmitt trigger output
This is an open-collector output.
VREG
3
LD
Phase lock detection output
This output goes to the on state (low-level output) in
the phase locked state.
This is an open-collector output.
VREG
2
3
Continued on next page.
No.8317-6/15
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