LC74725 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LC74725 Datasheet PDF : 16 Pages
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LC74725, 74725M
Continued from preceding page.
Parameter
Border level 0
Border level 1
Character level
Symbol
VBK0
VBK1
VCHA
Conditions
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
When the sync level is 0.8 V, CVOUT: VDD1, VDD2 = 5 V
When the sync level is 1.0 V, CVOUT: VDD1, VDD2 = 5 V
min
1.43
1.61
2.01
2.18
2.57
2.76
Timing Characteristics at Ta = –30 to +70°C, VDD1 = 5 V ± 0.5 V
Parameter
Symbol
Conditions
min
OSD write (See Figure 1.)
Minimum input pulse width
tW (SCLK) SCLK
200
tW (CS1) CS1 (the period when CS1 is high)
1
Data setup time
tSU (CS1) CS1
200
tSU (SIN) SIN
200
Data hold time
th (CS1) CS1
2
th (SIN) SIN
200
One-word write time
tword
The time to write 8 bits of data
4.2
twt
The RAM data write time
1
ESD read (See Figure 2 for the n-channel open-drain circuit.)
tCKCY
SCLK
2
Minimum input pulse width
tCKL
SCLK
1
tCKH
SCLK
1
Data setup time
tICK
SCLK
10
Output delay time
tCKO
CPDT
Note: Follows the OSD timing for the CMOS output circuit type.
typ
max
Unit
1.55
1.67
V
1.73
1.85
V
2.13
2.25
V
2.30
2.42
V
2.69
2.81
V
2.88
3.00
V
typ
max
Unit
ns
µs
ns
ns
µs
ns
µs
µs
ns
µs
µs
µs
0.5
µs
Figure 1 OSD Serial Data Input Timing
No. 5213-4/16
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