LC7940KD 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC7940KD

Dot-Matrix LCD Drivers

SANYO -> Panasonic 

LC7940KD / LC7941KDR

100×240-pixel LCD Panel Timing Diagram

M

LOAD

CP

SDI

#1

CDO #2

#3

M

LOAD

1,1

1,2

∼

1,79

1,80

1,81

∼ ∼ 1,160 1,161

1,240

Chip 1 data read

1 line (240 bits)

Chip 2 data read

Chip 3 data read

CP

SDI

M

#1 DIO1

LOAD

O1

#1 O2

O80

O1

#2

O80

O1

#3

O80

1,1

1,2

∼ 1,239 1,240

2,1

∼ 2,240 3,1

1st line data read

2nd line data read

1 frame (100×240 bits)

∼ 100,240

1,1

2,1

∼

98,1

99,1 100,1 1,1

∼

99,1 100,1

1,2

2,2

∼

98,2

99,2 100,2 1,2

∼

99,2 100,2

1,80

2,80

∼ 98,80 99,80 100,80 1,80

∼ 99,80 100,80

1,81 2,81

∼

98,81 99,81 100,81 1,81

∼

99,81 100,81

1,160 2,160

∼

98,160 99,160 100,160 1,160

∼

99,160 100,160

1,161 2,161

∼

98,161 99,161 100,161 1,161

∼

99,161 100,161

1,240 2,240

∼

∼ 98,240 99,240 100,240 1,240

99,240 100,240

No.A0573-11/13

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