LH5164AVH 데이터 시트보기 (PDF) - Sharp Electronics

부품명

상세내역

제조사

LH5164AVH

CMOS 64K (8K × 8) Static RAM

Sharp Electronics 

CMOS 64K (8K × 8) Static RAM

LH5164AVH

DATA RETENTION CHARACTERISTICS (TA = –40°C to +85°C)

PARAMETER

SYMBOL

CONDITIONS

MIN.

Data retention supply voltage VCCDR

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR – 0.2 V

2.0

Data retention supply current

ICCDR

VCCDR = 3 V,

CE2 ≤ 0.2 V or

CE1 ≥ VCCDR – 0.2 V

TA =

25°C

TA =

70°C

Chip disable to data retention

tCDR

0

Recovery time

tR

tRC

NOTES:

1. CE2 should be ≥ VCCDR – 0.2 V or ≤ 0.2 V.

2. tRC = Read cycle time.

MAX.

0.2

0.6

1.5

UNIT

V

µA

µA

µA

ns

ns

NOTE

1

1

2

CE1 CONTROL (NOTE)

VCC

3.0 V

CE1

VCC - 0.5 V

VCCDR

0V

CE2 CONTROL

VCC

CE2

3.0 V

tCDR

tCDR

DATA RETENTION MODE

tR

CE1 ≥ VCCDR - 0.2 V

DATA RETENTION MODE

tR

VCCDR

0.2 V

0V

CE2 ≤ 0.2 V

NOTE: To control the data retention mode at CE1, fix the input level of CE2 between

VCCDR to VCCDR - 0.2 V or 0 V and 0.2 V during the data retention mode.

Figure 4. Data Retention Characteristics

5164AVH-7

5

Share Link: