LH5164AVH 데이터 시트보기 (PDF) - Sharp Electronics

부품명

상세내역

제조사

LH5164AVH

CMOS 64K (8K × 8) Static RAM

Sharp Electronics 

LH5164AVH

CMOS 64K (8K × 8) Static RAM

A0 - A12

CE1

tWC

tAW

tCW

(NOTE 1)

tCW

tWR

(NOTE 2)

tWR

CE2

WE

DOUT

DIN

tAS

(NOTE 3)

(NOTE 5)

tWP

tWR

(NOTE 4)

tWZ

tOW

(NOTE 6)

(NOTE 7)

tDW

tDH

DATA VALID

NOTES:

1. tCW is defined as the time from the last occuring transition, either CE1 LOW transition or CE2 HIGH transition,

to the time when the writing is finished.

2. tWR is defined as the time from writing finish to address change.

3. tAS is defined as the time from address change to writing start.

4. The writing occurs during an overlapping period of CE1 = 'LOW,' CE2 = 'HIGH,' and WE = 'LOW' (tWP).

5. If CE1 LOW transition or CE2 HIGH transition occurs at the same time or after WE LOW transition, the

outputs will remain high-impedance.

6. If CE1 HIGH transition or CE2 LOW transition occurs at the same time or before WE HIGH transition,

the outputs will remain high-impedance.

7. When I/O pins are in the output state, input signals with the opposite logic level must not be applied.

Figure 7. Write Cycle (OE Low Fixed)

5164AVH-6

8

Share Link: