LH79524N0F100A1 데이터 시트보기 (PDF) - NXP Semiconductors.

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LH79524N0F100A1

System-on-Chip

NXP Semiconductors. 

System-on-Chip

NXP Semiconductors

LH79524/LH79525

LFBGA

PIN

SIGNAL NAME

M3

PB7/INT1/UARTTX0/

UARTIRTX0

N7 PC0/A16

R6 PC1/A17

T5 PC2/A18

P6 PC3/A19

R5 PC4/A20

T4 PC5/A21

P5 PC6/A22/nFWE

R4 PC7/A23/nFRE

P15 PD0/D8

P14 PD1/D9

N13 PD2/D10

T15 PD3/D11

N12 PD4/D12

T14 PD5/D13

P12 PD6/D14

T13 PD7/D15

B12

PE0/LCDLP/

LCDHRLP

D11 PE1/LCDDCLK

B13 PE2/LCDPS

C13 PE3/LCDCLS

D12

PE4/LCDDSPLEN/

LCDREV

B16 PE5/LCDVDDEN

B15

PE6/LCDVEEN/

LCDMOD

D14 PE7/nWAIT/nDEOT

A8 PF0/LCDVD6

A9 PF1/LCDVD7

B9 PF2/LCDVD8

C9 PF3/LCDVD9

B10 PF4/LCDVD10

A11 PF5/LCDVD11

B11 PF6/LCDEN/LCDSPL

A12 PF7/LCDFP/LCDSPS

A5 PG0/ETHERTXEN

B6 PG1/ETHERTXCLK

A6 PG2/LCDVD0

C7 PG3/LCDVD1

B7 PG4/LCDVD2

Table 2. LH79524 Pin Descriptions (Cont’d)

TYPE

DESCRIPTION

I/O

General Purpose I/O Signal — Port B7; multiplexed with UART0 Infrared Transmit-

ted Serial Data Output, UART0 Serial Transmit Data Out, and External Interrupt 1.

I/O General Purpose I/O Signal — Port C0; multiplexed with Address A16

I/O General Purpose I/O Signal — Port C1; multiplexed with Address A17

I/O General Purpose I/O Signal — Port C2; multiplexed with Address A18

I/O General Purpose I/O Signal — Port C3; multiplexed with Address A19

I/O General Purpose I/O Signal — Port C4; multiplexed with Address A20

I/O General Purpose I/O Signal — Port C5; multiplexed with Address A21

I/O

General Purpose I/O Signal — Port C6; multiplexed with Address A22 and NAND

Flash Write Enable

I/O

General Purpose I/O Signal — Port C7; multiplexed with Address A23 and NAND

Flash Read Enable

I/O General Purpose I/O Signal — Port D0; multiplexed with Data D8

I/O General Purpose I/O Signal — Port D1; multiplexed with Data D9

I/O General Purpose I/O Signal — Port D2; multiplexed with Data D10

I/O General Purpose I/O Signal — Port D3; multiplexed with Data D11

I/O General Purpose I/O Signal — Port D4; multiplexed with Data D12

I/O General Purpose I/O Signal — Port D5; multiplexed with Data D13

I/O General Purpose I/O Signal — Port D6; multiplexed with Data D14

I/O General Purpose I/O Signal — Port D7; multiplexed with Data D15

I/O

General Purpose I/O Signals — Port E0; multiplexed with LCD Line Pulse and

AD-TFT/HR-TFT Line Pulse

I/O General Purpose I/O Signals — Port E1; multiplexed with LCD Data Clock

I/O General Purpose I/O Signals — Port E2; multiplexed with LCD Power Save

I/O General Purpose I/O Signals — Port E3; multiplexed with LCD Row Driver Clock

I/O

General Purpose I/O Signals — Port E4; multiplexed with LCD Panel Power

Enable and LCD Reverse

I/O General Purpose I/O Signals — Port E5; multiplexed with LCD VDD Enable

I/O

General Purpose I/O Signals — Port E6; multiplexed with LCD Analog Power

Enable and MOD

I/O

General Purpose I/O Signals — Port E7; multiplexed with nWAIT and DMA End of

Transfer

I/O General Purpose I/O Signals — Port F0; multiplexed with LCD Video Data bit 6

I/O General Purpose I/O Signals — Port F1; multiplexed with LCD Video Data bit 7

I/O General Purpose I/O Signals — Port F2; multiplexed with LCD Video Data bit 8

I/O General Purpose I/O Signals — Port F3; multiplexed with LCD Video Data bit 9

I/O General Purpose I/O Signals — Port F4; multiplexed with LCD Video Data bit 10

I/O General Purpose I/O Signals — Port F5; multiplexed with LCD Video Data bit 11

I/O General Purpose I/O Signals — Port F6; multiplexed with LCD Start Pulse Left

I/O

General Purpose I/O Signals — Port F7; multiplexed with LCD Row Driver

Counter reset

I/O General Purpose I/O Signals — Port G0; multiplexed with Ethernet TX Enable

I/O General Purpose I/O Signals — Port G1; multiplexed with Ethernet TX Clock

I/O General Purpose I/O Signals — Port G2; multiplexed with LCD Video Data bit 0

I/O General Purpose I/O Signals — Port G3; multiplexed with LCD Video Data bit 1

I/O General Purpose I/O Signals — Port G4; multiplexed with LCD Video Data bit 2

Product data sheet

Rev. 02 — 17 March 2009

7

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