LMV358 데이터 시트보기 (PDF) - Fairchild Semiconductor
부품명
상세내역
제조사
LMV358 Datasheet PDF : 16 Pages
| |||
DATA SHEET
LMV321/LMV358/LMV324
Electrical Specifications
(Tc = 25°C, Vs = +5V, G = 2, RL = 10kΩ to Vs/2, Rf = 10kΩ, Vo (DC) = Vcc/2; unless otherwise noted)
Parameter
Conditions
Min.
Typ.
Max.
Unit
AC Performance
Gain Bandwidth Product
CL = 50pF, RL = 2kΩ to Vs/2
1.4
Phase Margin
73
MHz
deg
Gain Margin
12
dB
Slew Rate
1.5
V/µs
Input Voltage Noise
>50kHz
33
nV/√Hz
Crosstalk: LMV358
100kHz
91
dB
LMV324
100kHz
80
dB
DC Performance
Input Offset Voltage1
1
7
mV
Average Drift
Input Bias Current2
Input Offset Current2
Power Supply Rejection Ratio1
DC
Open Loop Gain1
Supply Current (Per Channel)1
6
µV/°C
<1
nA
<1
nA
50
65
dB
50
70
dB
100
150
µA
Input Characteristics
Input Common Mode Voltage Range1 LO
0
-0.4
V
HI
Common Mode Rejection Ratio1
3.8
3.6
V
50
75
dB
Output Characteristics
Output Voltage Swing
RL = 2kΩ to Vs/2; LO/HI
0.036 to 4.95
V
RL = 10kΩ to Vs/2; LO1
0.1
0.013
V
RL = 10kΩ to Vs/2; HI1
4.98
4.9
V
Short Circuit Output Current1
sourcing; Vo = 0V
5
+34
mA
sinking; Vo = 5V
10
-23
mA
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Notes:
1. Guaranteed by testing or statistical analysis at +25°C.
2. +IN and -IN are gates to CMOS transistors with typical input bias current of <1nA. CMOS leakage is too small to practically measure.
Package Thermal Resistance
Package
5 lead SC70
5 lead SOT23
8 lead SOIC
8 lead MSOP
14 lead TSSOP
14 lead SOIC
θJA
331.4°C/W
256°C/W
152°C/W
206°C/W
100°C/W
88°C/W
4
Rev. 1 November 2002
Share Link: 