LPC1102UK 데이터 시트보기 (PDF) - NXP Semiconductors.
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LPC1102UK Datasheet PDF : 43 Pages
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NXP Semiconductors
LPC1102/1104
32-bit ARM Cortex-M0 microcontroller
Table 3. LPC1102/1104 pin description table …continued
Symbol
LPC1102 LPC1104 Start Type
logic
input
Reset Description
state[1]
R/PIO1_2/
C3[4]
AD3/CT32B1_MAT1
C3[4]
no -
I; PU R — Reserved.
I/O -
PIO1_2 — General purpose digital input/output pin.
I
-
AD3 — A/D converter, input 3.
O
-
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO/PIO1_3/AD4/ D4[4]
CT32B1_MAT2
D4[4]
no I/O I; PU SWDIO — Serial wire debug input/output.
I/O -
PIO1_3 — General purpose digital input/output pin.
I
-
AD4 — A/D converter, input 4.
O
-
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_6/RXD/
CT32B0_MAT0
C2[3]
C2[3]
no I/O I; PU PIO1_6 — General purpose digital input/output pin.
I
-
RXD — Receiver input for UART.
O
-
CT32B0_MAT0 — Match output 0 for 32-bit timer 0.
PIO1_7/TXD/
CT32B0_MAT1
D1[3]
D1[3]
no I/O I; PU PIO1_7 — General purpose digital input/output pin.
O
-
TXD — Transmitter output for UART.
O
-
CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
VDD
D2; A1 D2
-
I
-
3.3 V supply voltage to the internal regulator, the
external rail, and the ADC. Also used as the ADC
reference voltage.
XTALIN
B2[5]
B1[5]
-
I
-
External clock input and input to internal clock
generator circuits. Input voltage must not exceed
1.8 V.
VSS
D3; B1 D3
-
I
-
Ground.
[1] Pin state at reset for default function: I = Input; PU = internal pull-up enabled (pins pulled up to full VDD level (VDD = 3.3 V)).
[2] 5 V tolerant pad. See Figure 22 for the reset pad configuration.
[3] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 21).
[4] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 21).
[5] When the external clock is not used, connect XTALIN as follows: XTALIN can be left floating or can be grounded (grounding is preferred
to reduce susceptibility to noise).
LPC1102_1104
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 26 September 2013
© NXP B.V. 2013. All rights reserved.
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