LPC2157 데이터 시트보기 (PDF) - Philips Electronics
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LPC2157
Philips Electronics
LPC2157 Datasheet PDF : 45 Pages
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NXP Semiconductors
LPC2157/2158
Single-chip 16-bit/32-bit microcontrollers
Table 2. Pin description LPC2157 …continued
Symbol
Pin
Type Description
RESET
83[8]
I
External reset input: A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0. TTL with hysteresis, 5 V tolerant.
XTAL1
88[9]
O
Input from the oscillator amplifier.
XTAL2
87[9]
I
Output to the oscillator circuit and internal clock generator circuits.
RTCX1
93[9]
I
Input to the RTC oscillator circuit.
RTCX2
94[9]
O
Output from the RTC oscillator circuit.
VSS
6, 13, 32, I
Ground: 0 V reference.
39, 40,
85, 95
VDD
11, 27, 33 I
3.3 V power supply: This is the power supply voltage for the core and I/O
ports.
VDDA
96
I
Analog 3.3 V power supply: This should be nominally the same voltage as
VDD but should be isolated to minimize noise and error. This voltage is only
used to power the on-chip ADC(s) and DAC.
VDD(LCD)
VLCD
VREF
38
I
1.8 V to 5.5 V power supply: Power supply voltage for the PCF8576D.
41
I
LCD power supply: LCD voltage.
89
I
ADC reference voltage: This should be nominally less than or equal to the
VDD voltage but should be isolated to minimize noise and error. Level on this
pin is used as a reference for ADC(s) and DAC.
VBAT
31
I
RTC power supply voltage: 3.3 V on this pin supplies the power to the RTC.
SDA_LCD
34
I/O
SDA LCD — I2C-bus data signal for the LCD controller.
SCL_LCD
35
I
SCL LCD — I2C-bus clock signal for the LCD controller.
SYNC
36
I/O
SYNC — cascade synchronization input/output
CLK
37
I/O
CLK — external clock input/output
BP0 to BP3
42 to 45 O
BP0 to BP3: LCD backplane outputs.
S0 to S31
46 to 77 O
S0 to S31: LCD segment outputs.
[1] 5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
[2] 5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If configured for an input
function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.
[3] Open-drain 5 V tolerant digital I/O I2C-bus 400 kHz specification compatible pad. It requires external pull-up to provide an output
functionality.
[4] 5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured
for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When configured as an ADC input, digital
section of the pad is disabled.
[5] 5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog output function. When
configured as the DAC output, digital section of the pad is disabled.
[6] 5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.
The pull-up resistor’s value typically ranges from 60 kΩ to 300 kΩ.
[7] Pad is designed in accordance with the Universal Serial Bus (USB) specification, revision 2.0 (Full-speed and Low-speed mode only).
[8] 5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.
[9] Pad provides special analog functionality.
LPC2157_2158_1
Product data sheet
Rev. 01 — 15 October 2008
© NXP B.V. 2008. All rights reserved.
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